Abstract: The present application provides an array substrate, a display panel, and a display apparatus, where the array substrate includes a substrate and an isolation structure, the isolation structure is arranged on a side of the substrate, and the isolation structure includes an isolation body and a blocking portion arranged in a stacked manner, where the blocking portion is located on a side of the isolation body away from the substrate, and the isolation body and the blocking portion meet the following relation: h1/L1?0.1, where h1 is a dimension of the blocking portion in a direction perpendicular to a surface of the substrate; and L1 is a dimension of the blocking portion protruding from the isolation body in a direction parallel to a contact surface between the blocking portion and the isolation body. In present application, the structural stability of the isolation body and the blocking portion is greater.

Abstract: The present application provides a display panel and an electronic device. The display panel includes a substrate and a pixel defining layer. The pixel defining layer is disposed on one side of the substrate and has pixel openings. Sidewalls of the pixel openings are continuously arranged, and in a direction away from the substrate, the sidewalls of the pixel openings successively has a first taper angle and a second taper angle, the first taper angle and the second taper angle are angles formed between a tangent line at a point on the sidewalls of the pixel openings and a plane where the substrate is located, and the second taper angle is greater than or equal to the first taper angle.

Abstract: A display panel and a method of manufacturing the display panel. The display panel includes a substrate, a conducting layer, an insulating layer and a light-emitting unit. The conducting layer includes a plurality of conducting traces spaced apart from one another. The insulating layer includes a first surface away from the substrate.

Abstract: An array substrate and a display panel are provided. The array substrate includes a base substrate and a first conductive layer, a first insulating layer, a second conductive layer and a third conductive layer which are sequentially stacked on the base substrate, the first insulating layer insulates the first conductive layer from the second conductive layer, the first conductive layer includes a first signal line, the second conductive layer includes a second signal line and a first connection part spaced apart from each other, the third conductive layer includes a second connection part, the first connection part is electrically connected with the first signal line through a first via hole in the first insulating layer; the second connection part is electrically connected with the first connection part and the second signal line to constitute a connection structure electrically connecting the first signal line with the second signal line.

Abstract: An array substrate and a display panel are provided. The array substrate includes a base substrate and a first conductive layer, a first insulating layer, a second conductive layer and a third conductive layer which are sequentially stacked on the base substrate, the first insulating layer insulates the first conductive layer from the second conductive layer, the first conductive layer includes a first signal line, the second conductive layer includes a second signal line and a first connection part spaced apart from each other, the third conductive layer includes a second connection part, the first connection part is electrically connected with the first signal line through a first via hole in the first insulating layer; the second connection part is electrically connected with the first connection part and the second signal line to constitute a connection structure electrically connecting the first signal line with the second signal line.

Abstract: An array substrate, a manufacturing method thereof and a display panel are provided, the array substrate includes a base substrate and a first conductive layer, a first insulating layer, a second conductive layer and a third conductive layer which are sequentially stacked on the base substrate, the first insulating layer insulates the first conductive layer from the second conductive layer, the first conductive layer includes a first signal line, the second conductive layer includes a second signal line and a first connection part spaced apart from each other, the third conductive layer includes a second connection part, the first connection part is electrically connected with the first signal line through a first via hole in the first insulating layer; the second connection part is electrically connected with the first connection part and the second signal line to constitute a connection structure electrically connecting the first signal line with the second signal line.

Abstract: A mother substrate and a display panel are disclosed. The mother substrate includes a plurality of display panels, a plurality of first test terminals and a plurality of first one-way conductive circuits. Each of the display panels has a display area, and includes a plurality of first signal lines extending from outside of the display area to the display area in parallel; the plurality of first signal lines of each of the display panels are respectively electrically connected to one of the plurality of first test terminals; the plurality of first one-way conductive circuits are respectively electrically connected to the plurality of first signal lines outside the display area and are configured to allow signals to be able to transmit only from the plurality of first test terminals to the plurality of first signal lines of each of the display panels.

Abstract: A mother substrate and a display panel are disclosed. The mother substrate includes a plurality of display panels, a plurality of first test terminals and a plurality of first one-way conductive circuits. Each of the display panels has a display area, and includes a plurality of first signal lines extending from outside of the display area to the display area in parallel; the plurality of first signal lines of each of the display panels are respectively electrically connected to one of the plurality of first test terminals; the plurality of first one-way conductive circuits are respectively electrically connected to the plurality of first signal lines outside the display area and are configured to allow signals to be able to transmit only from the plurality of first test terminals to the plurality of first signal lines of each of the display panels.

Abstract: A method for manufacturing a display panel, a display panel, and a display device are provided. The method includes: forming a plurality of gate lines and a common electrode line pattern on a base substrate; forming an insulating layer on the base substrate on which the plurality of gate lines and the common electrode line pattern are formed; forming a via hole on the insulating layer; and forming a metal conductive pattern on the base substrate on which the insulating layer is formed. The common electrode line and the common electrode connection block located on two sides of a gate line are electrically connected through a bridging structure in a conductive layer made of metal, which reduces the resistance of the bridging structure, so that the voltage uniformity throughout the common electrode line pattern which is bridged through the bridging pattern is high.

Abstract: A display substrate repairing method, a display substrate repairing system, a display substrate and a display panel are provided. The display substrate repairing method includes: forming, in the case that a signal line of the display substrate is detected to be open-circuited or short-circuited, a repair line at a disconnected portion of the signal line being open-circuited or a disconnected portion of the signal line formed during a short circuit repairing process; forming a protective layer at least in an area where the repair line is located.

Abstract: An array substrate, a manufacturing method thereof and a display panel are provided, the array substrate includes a base substrate and a first conductive layer, a first insulating layer, a second conductive layer and a third conductive layer which are sequentially stacked on the base substrate, the first insulating layer insulates the first conductive layer from the second conductive layer, the first conductive layer includes a first signal line, the second conductive layer includes a second signal line and a first connection part spaced apart from each other, the third conductive layer includes a second connection part, the first connection part is electrically connected with the first signal line through a first via hole in the first insulating layer; the second connection part is electrically connected with the first connection part and the second signal line to constitute a connection structure electrically connecting the first signal line with the second signal line.

Abstract: A thin film transistor, a method for fabricating the same, an array substrate, and a display panel are disclosed. The method includes: forming a semiconductor film comprising metallic elements, an etching stop film, and a source and drain film on a substrate in this order; and forming a pattern comprising an active layer, an etching stop layer, and a source and drain on the active layer by using a same mask plate, wherein the etching stop layer electrically connects the source and drain with the active layer. Since an etching stop film is formed on a semiconductor film comprising metallic elements, during etching the metal layer, the etching stop film can protect the semiconductor film comprising metallic elements from being etched, and this ensures the performance of the resultant active layer.

Abstract: A method for manufacturing a display panel, a display panel, and a display device are provided. The method includes: forming a plurality of gate lines and a common electrode line pattern on a base substrate; forming an insulating layer on the base substrate on which the plurality of gate lines and the common electrode line pattern are formed; forming a via hole on the insulating layer; and forming a metal conductive pattern on the base substrate on which the insulating layer is formed. The common electrode line and the common electrode connection block located on two sides of a gate line are electrically connected through a bridging structure in a conductive layer made of metal, which reduces the resistance of the bridging structure, so that the voltage uniformity throughout the common electrode line pattern which is bridged through the bridging pattern is high.

Abstract: A pixel unit includes a thin film transistor, a first insulating layer, a pixel electrode, a second insulating layer, a meltable conductive component, and a common electrode. The thin film transistor includes a drain electrode. The first insulating layer is arranged over the drain electrode. The pixel electrode is arranged over the first insulating layer and electrically coupled to the drain electrode. The second insulating layer is arranged over the pixel electrode. The meltable conductive component is arranged over the second insulating layer. The common electrode is arranged over the meltable conductive component and electrically coupled to the meltable conductive component.

Abstract: The present disclosure discloses a Thin Film Transistor array substrate, a method for manufacturing the same and a method for maintaining the same, and a display panel. The TFT array substrate includes: a substrate; gate lines, common electrode lines and data lines arranged on the substrate; and pixel electrodes arranged at pixel unit regions defined by the gate lines and the data lines. The TFT array substrate further includes weld metal electrically connected to the pixel electrodes. Projections of the weld metal onto the substrate and projections of target wires onto the substrate are overlapped at overlapping regions, and the target wires are the gate lines or the common electrode lines.

Abstract: A display substrate repairing method, a display substrate repairing system, a display substrate and a display panel are provided. The display substrate repairing method includes: forming, in the case that a signal line of the display substrate is detected to be open-circuited or short-circuited, a repair line at a disconnected portion of the signal line being open-circuited or a disconnected portion of the signal line formed during a short circuit repairing process; forming a protective layer at least in an area where the repair line is located.

Abstract: The present application discloses a fabrication method for forming an array substrate, including: forming, in a fanout region, a first signal-load line connected to a first group of data lead wires, and a second signal-load line connected to a second group of data lead wires; and forming, in the fanout region, at least one unidirectional device at a connection point of the first signal-load line and a data lead wire, at least one unidirectional device at a connection point of the second signal-load line and a data lead wire. The first signal-load line and the second signal-load line are each configured to transmit an external testing signal along a single direction to the data lead wires through the unidirectional devices.

Abstract: A thin film transistor, a method for fabricating the same, an array substrate, and a display panel are disclosed. The method includes: forming a semiconductor film comprising metallic elements, an etching stop film, and a source and drain film on a substrate in this order; and forming a pattern comprising an active layer, an etching stop layer, and a source and drain on the active layer by using a same mask plate, wherein the etching stop layer electrically connects the source and drain with the active layer. Since an etching stop film is formed on a semiconductor film comprising metallic elements, during etching the metal layer, the etching stop film can protect the semiconductor film comprising metallic elements from being etched, and this ensures the performance of the resultant active layer.

Abstract: An anti-electrostatic device used in an array substrate of a liquid crystal display and a method for manufacturing the same, and a substrate are disclosed. The method includes steps of: forming a first insulation layer on a first conductive layer; forming a pattern on the first insulation layer; forming an etching barrier layer on the pattern; forming a first via hole and a second via hole extending through the etching barrier layer, and forming a fifth via hole extending through the etching barrier layer and the first insulation layer; forming a second conductive layer on the etching barrier layer, wherein a first portion and a second portion of the second conductive layer are respectively electrically connected to the pattern via the first via hole and the second via hole, and one of them is electrically connected to the first conductive layer via a fifth via hole.

Abstract: The present application discloses a fabrication method for forming an array substrate, including: forming, in a fanout region, a first signal-load line connected to a first group of data lead wires, and a second signal-load line connected to a second group of data lead wires; and forming, in the fanout region, at least one unidirectional device at a connection point of the first signal-load line and a data lead wire, at least one unidirectional device at a connection point of the second signal-load line and a data lead wire. The first signal-load line and the second signal-load line are each configured to transmit an external testing signal along a single direction to the data lead wires through the unidirectional devices.