Patents by Inventor Xinguo ZHANG
Xinguo ZHANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11976014Abstract: The invention relates to the technical field of agricultural planting, in particular to a controlled-release bacterial fertilizer for peanuts and a preparation method of the special controlled-release bacterial fertilizer. The special controlled-release bacterial fertilizer is composed of an inner layer and an outer layer; after the outer layer is released completely, the inner-layer network structure gradually absorbs water and preserves moisture, and has good slow release and controlled release properties, thereby achieving the gradual release of the inner layer, high fertilizer utilization rate, exerting the efficacy of the microbial agent and facilitating the large-area promotion.Type: GrantFiled: July 20, 2020Date of Patent: May 7, 2024Assignee: Biotechnology Research Center, Shandong Academy of Agricultural SciencesInventors: Jialei Zhang, Xinguo Li, Shubo Wan, Feng Guo, Jianguo Wang, Zheng Zhang, Gao Chen, Chaohui Tang, Sha Yang, Zhenying Peng, Jingjing Meng
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Patent number: 11960869Abstract: An Android penetration method and device for implementing silent installation based on accessibility services. The method includes: acquiring a second target application by adding a load program to a first target application and adding penetration permissions using an Android decompilation technology; and implementing silent installation of the second target application using an accessibility service technology.Type: GrantFiled: January 5, 2022Date of Patent: April 16, 2024Assignee: Guangzhou UniversityInventors: Hui Lu, Zhihong Tian, Chengjie Jin, Luxiaohan He, Man Zhang, Jiageng Yang, Xinguo Zhang, Dongqiu Huang, Qi Sun, Yanbin Sun, Shen Su
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Patent number: 11828177Abstract: The present disclosure provides a comprehensive utilization method and test equipment for surface water, a goaf and geothermal energy in a coal mining subsidence area. The method comprises the following steps: determining a geothermal water collection area, arranging heat energy exchange equipment in a main roadway, and arranging a geothermal water extraction system, wherein the geothermal water extraction system comprises geothermal wells, extraction pipelines and tail water reinjection pipelines, the extraction pipelines are connected with the heat energy exchange equipment, and the tail water reinjection pipelines are connected with a water outlet of the heat energy exchange equipment; arranging a water channel on the surface, and arranging a drainage system on a subsidence trough to guide surface water to flow underground; and controlling directional and ordered flow of surface water through the coal mining subsidence area formed by ground mining to achieve sustainable mining of underground water.Type: GrantFiled: January 26, 2022Date of Patent: November 28, 2023Assignee: Shandong University of Science and TechnologyInventors: Jinhai Zhao, Liming Yin, Xinguo Zhang, Wenbin Sun, Changjian Zhou, Juntao Chen, Shichuan Zhang, Ning Jiang, Yangyang Li, Yin Liu, Yunzhao Zhang, Shupeng Zhang, Zhixue Zhang, Yang Qiao, Dan Kang
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Publication number: 20230003123Abstract: The present disclosure provides a comprehensive utilization method and test equipment for surface water, a goaf and geothermal energy in a coal mining subsidence area. The method comprises the following steps: determining a geothermal water collection area, arranging heat energy exchange equipment in a main roadway, and arranging a geothermal water extraction system, wherein the geothermal water extraction system comprises geothermal wells, extraction pipelines and tail water reinjection pipelines, the extraction pipelines are connected with the heat energy exchange equipment, and the tail water reinjection pipelines are connected with a water outlet of the heat energy exchange equipment; arranging a water channel on the surface, and arranging a drainage system on a subsidence trough to guide surface water to flow underground; and controlling directional and ordered flow of surface water through the coal mining subsidence area formed by ground mining to achieve sustainable mining of underground water.Type: ApplicationFiled: January 26, 2022Publication date: January 5, 2023Inventors: Jinhai ZHAO, Liming YIN, Xinguo ZHANG, Wenbin SUN, Changjian ZHOU, Juntao CHEN, Shichuan ZHANG, Ning JIANG, Yangyang LI, Yin LIU, Yunzhao ZHANG, Shupeng ZHANG, Zhixue ZHANG, Yang QIAO, Dan KANG
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Publication number: 20220129256Abstract: Embodiments of the present invention provides an Android penetration method and device for implementing silent installation based on accessibility services. The method includes: acquiring a second target application by adding a load program to a first target application and adding penetration permissions using an Android decompilation technology; and implementing silent installation of the second target application using an accessibility service technology. The embodiment of the present invention enables a terminal to perform silent penetration test without root and user interaction. The embodiments of the present invention can also improve the stability of the penetration session.Type: ApplicationFiled: January 5, 2022Publication date: April 28, 2022Inventors: Hui Lu, Zhihong Tian, Chengjie Jin, Luxiaohan He, Man Zhang, Jiageng Yang, Xinguo Zhang, Dongqiu Huang, Qi Sun, Yanbin Sun, Shen Su
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Patent number: 9842038Abstract: Embodiments of the present invention utilize a dual buffer size threshold system for raising interrupts that allows DUT testing systems to perform real-time buffer memory allocation procedures in an on demand basis. Using dual interrupt threshold systems in the manner described by embodiments of the present invention, DUT testing systems can reduce the need to decide on a single buffer size threshold when testing a set of DUTs that separately provide different amounts of fail data relative to each other. As such, embodiments of the present invention can minimize the overhead processing spent on interrupt handling while also reducing the amount wait time needed for the data processing module to process fail data for each DUT. Thus, embodiments of the present invention can increase the use of tester resources more efficiently while decrease the amount of time a tester system spends collecting and/or analyzing fail data for a set of DUTs during a testing session.Type: GrantFiled: April 30, 2015Date of Patent: December 12, 2017Assignee: Advantest CorporationInventors: Xinguo Zhang, Yi Liu, Ze'ev Raz, Darrin Albers, Alan S. Krech, Jr., Shigeo Chiyoda, Jesse Hobbs
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Patent number: 9612272Abstract: An ATE system performs RA over NAND flash memory DUTs. A first UBM captures fresh failure related data from a DUT. A second UBM transmits existing failure related data. A fail engine accesses the stored existing failure related data and generates a failure list based thereon. The storing and the accessing the existing failure related data, and/or the generating the failure list, are performed in parallel contemporaneously in relation to the capturing the fresh data. The generated failure list is queued. A failure processor, which may be operable for controlling the capturing, computes a redundancy analysis based on the queued failure list. The first and second UBMs then ping-pong operably.Type: GrantFiled: February 26, 2014Date of Patent: April 4, 2017Assignee: ADVANTEST CORPORATIONInventors: Xinguo Zhang, Michael Jones, Ken Hanh Duc Lai, Edmundo De La Puente, Alan S. Krech, Jr.
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Patent number: 9558852Abstract: System and method of selecting defective columns in NAND memory devices for repair. After locating the defective blocks and defective columns in a NAND memory device, a weight value is calculated for each defective block by dividing a total number of defective blocks that would be inherently repaired as a result of repairing the respective defective block by a number of defective data columns in the respective defective block. A defective block with the greatest weight value is selected for repair in which the defective columns in the selected block are substituted by redundant columns. Other defective blocks with defective columns having the same column addresses with the defective columns in the selected defective block are automatically selected for repair as well. Remaining defective columns are selected for repair by iteratively updating weight values and selecting a defective block that has the greatest weight value among the remaining defective blocks.Type: GrantFiled: April 15, 2015Date of Patent: January 31, 2017Assignee: Advantest CorporationInventors: Xinguo Zhang, Ze'ev Raz, Yang Liu
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Publication number: 20160321153Abstract: Embodiments of the present invention utilize a dual buffer size threshold system for raising interrupts that allows DUT testing systems to perform real-time buffer memory allocation procedures in an on demand basis. Using dual interrupt threshold systems in the manner described by embodiments of the present invention, DUT testing systems can reduce the need to decide on a single buffer size threshold when testing a set of DUTs that separately provide different amounts of fail data relative to each other. As such, embodiments of the present invention can minimize the overhead processing spent on interrupt handling while also reducing the amount wait time needed for the data processing module to process fail data for each DUT. Thus, embodiments of the present invention can increase the use of tester resources more efficiently while decrease the amount of time a tester system spends collecting and/or analyzing fail data for a set of DUTs during a testing session.Type: ApplicationFiled: April 30, 2015Publication date: November 3, 2016Inventors: Xinguo ZHANG, Yi LIU, Ze'ev RAZ, Darrin ALBERS, Alan S. KRECH, JR., Shigeo CHIYODA, Jesse HOBBS
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Patent number: 9330792Abstract: Automated testing system and method of testing memory devices with distributed processing operations. A redundancy analysis system includes multiple test site processors (TSPs) respectively coupled to multiple devices under test (DUTs). Each TSP is installed with a redundancy analyzer configured to analyzing redundancy data returned from a respective (DUT). Each TSP may be coupled with a respective fail engine for returning the redundancy data from the corresponding DUT. A main TSP of the multiple TSPs is configured to control testing routine over the multiple DUTs and process failure related data from the DUTs. The main TSP may direct the RAs distributed in the multiple TSPs to execute the redundancy analyzers in parallel.Type: GrantFiled: February 26, 2014Date of Patent: May 3, 2016Assignee: ADVANTEST CORPORATIONInventors: Xinguo Zhang, Ze'ev Raz, Ken Hanh Duc Lai, Edmundo De La Puente
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Publication number: 20150294741Abstract: System and method of selecting defective columns in NAND memory devices for repair. After locating the defective blocks and defective columns in a NAND memory device, a weight value is calculated for each defective block by dividing a total number of defective blocks that would be inherently repaired as a result of repairing the respective defective block by a number of defective data columns in the respective defective block. A defective block with the greatest weight value is selected for repair in which the defective columns in the selected block are substituted by redundant columns. Other defective blocks with defective columns having the same column addresses with the defective columns in the selected defective block are automatically selected for repair as well. Remaining defective columns are selected for repair by iteratively updating weight values and selecting a defective block that has the greatest weight value among the remaining defective blocks.Type: ApplicationFiled: April 15, 2015Publication date: October 15, 2015Inventors: Xinguo ZHANG, Ze'ev RAZ, Yang LIU
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Publication number: 20150243370Abstract: ATE performs testing of memory devices with distributed processing operations. A redundancy analysis (RA) system has a first test site processor (TSP), operable for controlling a testing routine over multiple DUTs and analyzing redundancy data returned from a first of the DUTs. The RA has at least a second TSP, operable for analyzing redundancy data returned from a second of the DUTs. The RA may have one or more additional TSPs, each operable for analyzing redundancy data returned from an additional DUT. Controlling the testing routine includes directing the RA in each of the first and second (and any of the additional) TSPs.Type: ApplicationFiled: February 26, 2014Publication date: August 27, 2015Applicant: Advantest CorporationInventors: Xinguo ZHANG, Ze'ev RAZ, Ken Hanh Duc LAI, Edmundo DE LA PUENTE
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Publication number: 20150243369Abstract: An ATE system performs RA over NAND flash memory DUTs. A first UBM captures fresh failure related data from a DUT. A second UBM transmits existing failure related data. A fail engine accesses the stored existing failure related data and generates a failure list based thereon. The storing and the accessing the existing failure related data, and/or the generating the failure list, are performed in parallel contemporaneously in relation to the capturing the fresh data. The generated failure list is queued. A failure processor, which may be operable for controlling the capturing, computes a redundancy analysis based on the queued failure list. The first and second UBMs then ping-pong operably.Type: ApplicationFiled: February 26, 2014Publication date: August 27, 2015Applicant: Advantest CorporationInventors: Xinguo ZHANG, Michael JONES, Ken Hanh Duc LAI, Edmundo DE LA PUENTE, Alan S. KRECH, JR.