Abstract: Aspects of data modification for neural networks are described herein. The aspects may include a connection value generator configured to receive one or more groups of input data and one or more weight values and generate one or more connection values based on the one or more weight values. The aspects may further include a pruning module configured to modify the one or more groups of input data and the one or more weight values based on the connection values. Further still, the aspects may include a computing unit configured to update the one or more weight values and/or calculate one or more input gradients.

Abstract: An integrated circuit chip apparatus and a processing method performed by an integrated circuit chip apparatus are disclosed. The disclosed integrated circuit chip apparatus and processing method are used for executing a multiplication operation, a convolution operation, or a training operation of a neural network. The present technical solution has the advantages of a reduced computational cost and low power consumption.

Abstract: Provided are an integrated circuit chip apparatus and a related product, the integrated circuit chip apparatus being used for executing a multiplication operation, a convolution operation or a training operation of a neural network. The present technical solution has the advantages of a small amount of calculation and low power consumption.

Abstract: Provided are an integrated circuit chip device and related products. The integrated circuit chip device is used for performing a multiplication operation, a convolution operation or a training operation of a neural network. The device has the advantages of small calculation amount and low power consumption.

Abstract: Provided are an integrated circuit chip apparatus and a related product, the integrated circuit chip apparatus being used for executing a multiplication operation, a convolution operation or a training operation of a neural network. The present technical solution has the advantages of a small amount of calculation and low power consumption.

Abstract: Provided are an integrated circuit chip apparatus and a related product, the integrated circuit chip apparatus being used for executing a multiplication operation, a convolution operation or a training operation of a neural network. The present technical solution has the advantages of a small amount of calculation and low power consumption.

Abstract: Provided are an integrated circuit chip apparatus and a related product, the integrated circuit chip apparatus being used for executing a multiplication operation, a convolution operation or a training operation of a neural network. The present technical solution has the advantages of a small amount of calculation and low power consumption.

Abstract: Provided are an integrated circuit chip apparatus and a related product, the integrated circuit chip apparatus being used for executing a multiplication operation, a convolution operation or a training operation of a neural network. The present technical solution has the advantages of a small amount of calculation and low power consumption.

Abstract: Provided are an integrated circuit chip apparatus and a related product, the integrated circuit chip apparatus being used for executing a multiplication operation, a convolution operation or a training operation of a neural network. The present technical solution has the advantages of a small amount of calculation and low power consumption.

Abstract: Aspects of data modification for neural networks are described herein. The aspects may include a connection value generator configured to receive one or more groups of input data and one or more weight values and generate one or more connection values based on the one or more weight values. The aspects may further include a pruning module configured to modify the one or more groups of input data and the one or more weight values based on the connection values. Further still, the aspects may include a computing unit configured to update the one or more weight values and/or calculate one or more input gradients.

Abstract: An integrated circuit chip device and related products are provided. The integrated circuit chip device is used for performing a multiplication operation, a convolution operation or a training operation of a neural network. The device has the advantages of small calculation amount and low power consumption.

Abstract: An integrated circuit chip device and related products are provided. The integrated circuit chip device is used for performing a multiplication operation, a convolution operation or a training operation of a neural network. The device has the advantages of small calculation amount and low power consumption.

Abstract: An integrated circuit chip device and related products are provided. The integrated circuit chip device is used for performing a multiplication operation, a convolution operation or a training operation of a neural network. The device has the advantages of small calculation amount and low power consumption.

Abstract: An integrated circuit chip device and related products are provided. The integrated circuit chip device is used for performing a multiplication operation, a convolution operation or a training operation of a neural network. The device has the advantages of small calculation amount and low power consumption.

Abstract: An integrated circuit chip device and related products are provided. The integrated circuit chip device is used for performing a multiplication operation, a convolution operation or a training operation of a neural network. The device has the advantages of small calculation amount and low power consumption.

Abstract: An integrated circuit chip device and related products are provided. The integrated circuit chip device is used for performing a multiplication operation, a convolution operation or a training operation of a neural network. The device has the advantages of small calculation amount and low power consumption.

Abstract: An integrated circuit chip apparatus and a processing method performed by an integrated circuit chip apparatus are disclosed. The disclosed integrated circuit chip apparatus and processing method are used for executing a multiplication operation, a convolution operation, or a training operation of a neural network. The present technical solution has the advantages of a reduced computational cost and low power consumption.

Abstract: Provided are an integrated circuit chip device and related products. The integrated circuit chip device is used for performing a multiplication operation, a convolution operation or a training operation of a neural network. The device has the advantages of small calculation amount and low power consumption.

Abstract: Provided are an integrated circuit chip apparatus and a related product, the integrated circuit chip apparatus being used for executing a multiplication operation, a convolution operation or a training operation of a neural network. The present technical solution has the advantages of a small amount of calculation and low power consumption.

Abstract: Provided are an integrated circuit chip apparatus and a related product, the integrated circuit chip apparatus being used for executing a multiplication operation, a convolution operation or a training operation of a neural network. The present technical solution has the advantages of a small amount of calculation and low power consumption.