Patents by Inventor Xinlei Ding

Xinlei Ding has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240121997
    Abstract: Provided are a display substrate, a preparation method thereof and a display apparatus. The display substrate includes a first semi-conductive layer, a first conductive layer, a second conductive layer, a second semi-conductive layer, a third conductive layer, an interlayer insulating layer and an organic layer stacked on a substrate. The first semi-conductive layer includes an active layer of a polysilicon transistor, the first conductive layer includes a gate electrode of a polysilicon transistor and a first electrode plate of a storage capacitor, the second conductive layer includes a second electrode plate of a storage capacitor, the second semi-conductive layer includes an active layer of an oxide transistor, and the third conductive layer includes a gate electrode of an oxide transistor.
    Type: Application
    Filed: April 28, 2021
    Publication date: April 11, 2024
    Inventors: Xiaoqi DING, Peng HUANG, Ke LIU, Tao GAO, Xinlei YANG, Guoyi CUI, Zeliang LI, Hui LU
  • Patent number: 10880991
    Abstract: Embodiments described herein provide an electronic device having an integrated circuit disposed in a surface mount package. The surface mount integrated circuit package comprises a first pin and a second pin of the integrated circuit configured to couple the integrated circuit to a first terminal and a second terminal disposed on a circuit board. The first pin and second pin define a first connector and a second connector of a differential connector pair in the surface mount integrated circuit package for transferring differential signals from the integrated circuit to the circuit board. The surface mount integrated circuit package comprises an isolation stud disposed between the first pin and the second pin. The isolation stud is disconnected from the integrated circuit and configured to enlarge a gap between the first pin and the second pin relative to respective gaps of other pins coupling the electronic device to the circuit board.
    Type: Grant
    Filed: October 31, 2018
    Date of Patent: December 29, 2020
    Assignee: Marvell Asia Pte, Ltd.
    Inventors: Thomas T. Ngo, Xinlei Ding, Dance Wu, Chengchih Shih, Zhiqiang Li
  • Publication number: 20190313523
    Abstract: Embodiments described herein provide an electronic device having an integrated circuit disposed in a surface mount package. The surface mount integrated circuit package comprises a first pin and a second pin of the integrated circuit configured to couple the integrated circuit to a first terminal and a second terminal disposed on a circuit board. The first pin and second pin define a first connector and a second connector of a differential connector pair in the surface mount integrated circuit package for transferring differential signals from the integrated circuit to the circuit board. The surface mount integrated circuit package comprises an isolation stud disposed between the first pin and the second pin. The isolation stud is disconnected from the integrated circuit and configured to enlarge a gap between the first pin and the second pin relative to respective gaps of other pins coupling the electronic device to the circuit board.
    Type: Application
    Filed: October 31, 2018
    Publication date: October 10, 2019
    Inventors: Thomas T. Ngo, Xinlei Ding, Dance Wu, Chengchih Shih, Zhiqiang Li
  • Patent number: D1024078
    Type: Grant
    Filed: June 16, 2023
    Date of Patent: April 23, 2024
    Assignee: WAYMEET (SHENZHEN)TECHNOLOGY CO., LTD.
    Inventors: Zebo Ding, Yaohua Xie, Weiwei Xu, Xinlei Yu