Patents by Inventor Xinning Wang

Xinning Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240113177
    Abstract: An integrated circuit includes a first device having a first source or drain region, and a second device having a second source or drain region that is laterally adjacent to the first source or drain region. A conductive source or drain contact includes (i) a lower portion in contact with the first source or drain region, and extending above the first source or drain region, and (ii) an upper portion extending laterally from above the lower portion to above the second source or drain region. A dielectric material is between at least a section of the upper portion of the conductive source or drain contact and the second source or drain region. In an example, each of the first and second devices is a gate-all-around (GAA) device having one or more nanoribbons, nanowires, or nanosheets as channel regions, or is a finFet structure having a fin-based channel region.
    Type: Application
    Filed: September 30, 2022
    Publication date: April 4, 2024
    Applicant: Intel Corporation
    Inventors: Sukru Yemenicioglu, Quan Shi, Marni Nabors, Charles H. Wallace, Xinning Wang, Tahir Ghani, Andy Chih-Hung Wei, Mohit K. Haran, Leonard P. Guler, Sivakumar Venkataraman, Reken Patel, Richard Schenker
  • Publication number: 20240113104
    Abstract: Techniques are provided to form semiconductor devices that include a gate cut that passes through a plurality of semiconductor bodies (e.g., nanoribbons or nanosheets) such that the gate cut acts as a dielectric spine in a forksheet arrangement with the semiconductor bodies on either side of the gate cut. In an example, two semiconductor devices in a forksheet arrangement include semiconductor bodies directly on either side of a dielectric spine. A gate structure includes a gate dielectric (e.g., high-k gate dielectric material) and a gate electrode (e.g., conductive material such as workfunction material and/or gate fill metal) that extends around each of the semiconductor bodies of both semiconductor devices. The dielectric spine interrupts the entire height of the gate structure between the two devices and includes dielectric material (e.g., low-k dielectric), and the gate dielectric of the gate structure is not present along sidewalls of the spine between adjacent bodies.
    Type: Application
    Filed: September 30, 2022
    Publication date: April 4, 2024
    Applicant: Intel Corporation
    Inventors: Sukru Yemenicioglu, Leonard P. Guler, Tahir Ghani, Xinning Wang
  • Publication number: 20240113107
    Abstract: An integrated circuit includes a first device and a laterally adjacent second device. The first device includes a first body including semiconductor material extending from a first source region to a first drain region, and a first gate structure on the first body. The second device includes a second body including semiconductor material extending from a second source region to a second drain region, and a second gate structure on the second body. A gate cut including dielectric material is between and laterally separates the first gate structure and the second gate structure. The first body is separated laterally from the gate cut by a first distance, and the second body is separated laterally from the gate cut by a second distance. In an example, the first and second distances differ by at least 2 nanometers. In an example, the first and second devices are fin-based devices or gate-all-around devices.
    Type: Application
    Filed: September 30, 2022
    Publication date: April 4, 2024
    Applicant: Intel Corporation
    Inventors: Sukru Yemenicioglu, Leonard P. Guler, Tahir Ghani, Marni Nabors, Xinning Wang
  • Publication number: 20230420512
    Abstract: Integrated circuit structures having backside power staple are described. In an example, an integrated circuit structure includes a plurality of gate lines. A plurality of trench contacts is extending over a plurality of source or drain structures, individual ones of the plurality of trench contacts alternating with individual ones of the plurality of gate lines. A front-side metal routing layer is extending over one or more of the plurality of gate lines, and over and coupled to one or more of the plurality of trench contacts. A backside metal routing layer is extending beneath the one or more of the plurality of gate lines and the one or more of the plurality of trench contacts, the backside metal routing layer parallel and overlapping with the front-side metal routing layer. A conductive feedthrough structure couples the backside metal routing layer to the front-side metal routing layer.
    Type: Application
    Filed: June 27, 2022
    Publication date: December 28, 2023
    Inventors: Sukru YEMENICIOGLU, Xinning WANG, Nischal ARKALI RADHAKRISHNA, Leonard P. GULER, Mauro J. KOBRINSKY, June CHOI, Pratik PATEL, Tahir GHANI
  • Publication number: 20230414795
    Abstract: PSMA targeted compounds, pharmaceutical compositions comprising these compounds, and methods for treating and detecting cancers in a subject are described herein.
    Type: Application
    Filed: August 28, 2023
    Publication date: December 28, 2023
    Inventors: James Basilion, Zhenghong Lee, Xinning Wang
  • Publication number: 20230317602
    Abstract: Embodiments described herein may be related to apparatuses, processes, and techniques for providing a metal routing layer zero (M0) track within a circuit structure that had a width that overlaps both PMOS and NMOS within the circuit structure. There may be three M0 routing tracks, with a first of the M0 routing tracks directly over PMOS, a second of the M0 routing tracks directly over NMOS, and a third of the M0 routing tracks over a portion separating PMOS and NMOS and overlapping both PMOS and NMOS. The wide second routing track will allow efficient electrical coupling between a device on the PMOS and a device on the NMOS. Other embodiments may be described and/or claimed.
    Type: Application
    Filed: March 31, 2022
    Publication date: October 5, 2023
    Inventors: Sukru YEMENICIOGLU, Richard E. SCHENKER, Xinning WANG, Tahir GHANI
  • Publication number: 20230207551
    Abstract: Embodiments of the disclosure are directed to advanced integrated circuit structure fabrication and, in particular, to standard cell architectures without power delivery space allocation. Other embodiments may be described or claimed.
    Type: Application
    Filed: December 23, 2021
    Publication date: June 29, 2023
    Inventors: Sukru YEMENICIOGLU, Richard E. SCHENKER, Xinning WANG, Mauro J. KOBRINSKY, Tahir GHANI
  • Publication number: 20230187515
    Abstract: Described herein are integrated circuit structures having versatile channel placement, and methods of fabricating integrated circuit structures having versatile channel placement. In an example, an integrated circuit structure includes a first vertical stack of horizontal nanowires having a first width. A second vertical stack of horizontal nanowires is immediately neighboring and parallel with the first vertical stack of horizontal nanowires and has a second width greater than the first width. A third vertical stack of horizontal nanowires is immediately neighboring and parallel with the second vertical stack of horizontal nanowires and has the first width.
    Type: Application
    Filed: December 13, 2021
    Publication date: June 15, 2023
    Inventors: Sukru YEMENICIOGLU, Tahir GHANI, Xinning WANG, Leonard P. GULER, Charles H. WALLACE, Mohit K. HARAN
  • Publication number: 20230187444
    Abstract: Integrated circuit structures having gate cut offset, and methods of fabricating integrated circuit structures having gate cut offset, are described. For example, an integrated circuit structure includes a first vertical stack of horizontal nanowires. A second vertical stack of horizontal nanowires is spaced apart from and parallel with the first vertical stack of horizontal nanowires. A gate structure includes a first gate structure portion over the first vertical stack of horizontal nanowires, a second gate structure over the second vertical stack of horizontal nanowires, and a gate cut between the first gate structure portion and the second gate structure portion, the gate cut laterally closer to the second vertical stack of horizontal nanowires than to the first vertical stack of horizontal nanowires.
    Type: Application
    Filed: December 13, 2021
    Publication date: June 15, 2023
    Inventors: Sukru YEMENICIOGLU, Xinning WANG, Allen B. GARDINER, Tahir GHANI, Mohit K. HARAN, Leonard P. GULER
  • Publication number: 20230144483
    Abstract: Provided is a method for encoding video data. The method includes: acquiring video data; configuring an encoding parameter of an encoder; determining a first time interval between two adjacent video frames in a group of pictures based on the encoding parameter; and adjusting a number of video frames in the group of pictures based on the first time interval by encoding the video data based on the encoding parameter. A device and a storage medium are also provided.
    Type: Application
    Filed: August 24, 2020
    Publication date: May 11, 2023
    Inventors: Xinning WANG, Qing LIU, Leju YAN
  • Publication number: 20220378926
    Abstract: PSMA targeted conjugate compounds, pharmaceutical compositions comprising these compounds, methods for treating and detecting cancers in a subject, methods for identifying cancer cells in a sample are described herein.
    Type: Application
    Filed: December 20, 2021
    Publication date: December 1, 2022
    Inventors: James P. Basilion, Xinning Wang, Natalie Walker
  • Publication number: 20220262791
    Abstract: Integrated circuit structures having front side signal lines and backside power delivery are described. In an example, an integrated circuit structure includes a plurality of gate lines extending over a plurality of semiconductor nanowire stack or fin channel structures within a cell boundary. A plurality of trench contacts is extending over a plurality of source or drain structures within the cell boundary, individual ones of the plurality of trench contacts alternating with individual ones of the plurality of gate lines. A first signal line, a second signal line, a third signal line, and a fourth signal line are over the plurality of gate lines and the plurality of trench contacts within the cell boundary. A backside power delivery line is coupled to one of the plurality of trench contacts within the cell boundary.
    Type: Application
    Filed: February 16, 2021
    Publication date: August 18, 2022
    Inventors: Quan SHI, Sukru YEMENICIOGLU, Marni NABORS, Nikolay RYZHENKO, Xinning WANG, Sivakumar VENKATARAMAN
  • Publication number: 20220096663
    Abstract: Prostate-specific membrane antigen (PSMA) targeted compounds having formula (I), nanoclusters formed thereof, pharmaceutical compositions comprising a plurality of these compounds, and methods for treating and detecting cancers in a subject are described herein.
    Type: Application
    Filed: January 21, 2020
    Publication date: March 31, 2022
    Inventors: James Basilion, Clemens Burda, Dong Luo, Xinning Wang
  • Patent number: 11202836
    Abstract: PSMA targeted conjugate compounds, pharmaceutical compositions comprising these compounds, methods for treating and detecting cancers in a subject, methods for identifying cancer cells in a sample are described herein.
    Type: Grant
    Filed: September 23, 2020
    Date of Patent: December 21, 2021
    Assignee: CASE WESTERN RESERVE UNIVERSITY
    Inventors: James P. Basilion, Xinning Wang, Natalie Walker
  • Publication number: 20210388365
    Abstract: A method of enhancing vanillin resistance of Saccharomyces cerevisiae, including: knocking out SNG1 gene from a genome of Saccharomyces cerevisiae. This application further provides a mutant of SNG1 gene of Saccharomyces cerevisiae including the nucleotide sequence shown in SEQ ID NO: 1, where the sequence shown in SEQ ID NO: 1, from left to right, consists of a ?18˜+203 bp fragment of SNG1 gene of Saccharomyces cerevisiae, a nucleotide fragment of loxp-KanMX4-loxp and a +1446˜+1644 bp fragment of the SNG1 gene of Saccharomyces cerevisiae.
    Type: Application
    Filed: December 10, 2020
    Publication date: December 16, 2021
    Inventors: Xiaoming BAO, Xinning WANG, Wenyan CAO, Weiquan ZHAO, Zailu LI
  • Publication number: 20210060173
    Abstract: PSMA targeted conjugate compounds, pharmaceutical compositions comprising these compounds, methods for treating and detecting cancers in a subject, methods for identifying cancer cells in a sample are described herein.
    Type: Application
    Filed: September 23, 2020
    Publication date: March 4, 2021
    Inventors: James P. Basilion, Xinning Wang, Natalie Walker
  • Patent number: 10918741
    Abstract: A PSMA-specific imaging agent comprising a compound according to formula I: are described, wherein S1 is an organic spacer group having from 5 to 30 carbons, A is an amino acid forming a portion of a negatively charged peptide oligomer, n is from 3 to 6, S2 is an organic spacer group having from 5 to 15 carbons, and I is an imaging group, and pharmaceutically acceptable salts thereof. The PSMA-specific imaging agents can be used to image PSMA within a tissue region to guide the treatment of diseases such as prostate cancer.
    Type: Grant
    Filed: June 26, 2017
    Date of Patent: February 16, 2021
    Assignee: THE CLEVELAND CLINIC FOUNDATION
    Inventors: Steve Shih-Lin Huang, Warren D. Heston, Xinning Wang
  • Patent number: 10709794
    Abstract: A phthalocyanine compound or targeted conjugate thereof having the formula (I).
    Type: Grant
    Filed: February 19, 2019
    Date of Patent: July 14, 2020
    Assignee: CASE WESTERN RESERVE UNIVERSITY
    Inventors: James Basilion, Xinning Wang, Clemens Burda
  • Patent number: 10434194
    Abstract: A PSMA targeted nanobubble includes a membrane that defines at least one internal void, which includes at least one gas, and at least one PSMA ligand coupled or conjugated to the membrane. The membrane includes at least one lipid and at least one nonionic triblock copolymer that is effective to control the size of the nanobubble without compromising in vitro and in vivo echogenicity of the nanobubble.
    Type: Grant
    Filed: August 30, 2017
    Date of Patent: October 8, 2019
    Assignee: CASE WESTERN RESERVE UNIVERSITY
    Inventors: James R. Basilion, Agata Exner, Xinning Wang, Christopher Hernandez
  • Patent number: 10363313
    Abstract: Compounds that are PSMA ligands, pharmaceutical compositions comprising these compounds, methods for treating and detecting cancers in a subject, methods for identifying cancer cells in a sample are described herein.
    Type: Grant
    Filed: February 13, 2018
    Date of Patent: July 30, 2019
    Assignee: CASE WESTERN RESERVE UNIVERSITY
    Inventors: James Basilion, Xinning Wang, Clemens Burda