Abstract: An integrated circuit with a fault reporting structure. The integrated circuit has at least one power MOSFET having a plurality of MOSFET cells with each MOSFET cell having a drain metal and a source metal, and the integrated circuit has a power MOSFET area for routing the drain metals and the source metals of the plurality of MOSFET cells. The fault reporting structure has a metal net routed in the power MOSFET area or in an area above or below the power MOSFET area.

Abstract: A low inductance power module with low power loop inductance and high-power density is provided. The power module may include a vertical power loop structure, a cooling layer, and a thermal dissipation structure. The vertical power loop structure may utilize a substrate bottom conduction layer for electrical conduction. The thermal dissipation structure may be disposed between the substrate bottom conduction layer and the cooling layer. The vertical power loop structure may include integrated decoupling capacitors. Alternatively, the structure may include no integrated decoupling capacitors. The vertical power loop structure may include one or more half-bridge structures connected in parallel, each with its own integrated decoupling capacitors. The vertical power loop structure reduces power loop inductance in the power module, and the thermal dissipation structure provides electrical insulation, mechanical support, and thermal conduction.

Abstract: A low inductance power module with low power loop inductance and high-power density is provided. The power module may include a vertical power loop structure, a cooling layer, and a thermal dissipation structure. The vertical power loop structure may utilize a substrate bottom conduction layer for electrical conduction. The thermal dissipation structure may be disposed between the substrate bottom conduction layer and the cooling layer. The vertical power loop structure may include integrated decoupling capacitors. Alternatively, the structure may include no integrated decoupling capacitors. The vertical power loop structure may include one or more half-bridge structures connected in parallel, each with its own integrated decoupling capacitors. The vertical power loop structure reduces power loop inductance in the power module, and the thermal dissipation structure provides electrical insulation, mechanical support, and thermal conduction.

Abstract: An integrated circuit with a fault reporting structure. The integrated circuit has at least one power MOSFET having a plurality of MOSFET cells with each MOSFET cell having a drain metal and a source metal, and the integrated circuit has a power MOSFET area for routing the drain metals and the source metals of the plurality of MOSFET cells. The fault reporting structure has a metal net routed in the power MOSFET area or in an area above or below the power MOSFET area.

Abstract: A sandwich structure power supply module, having: an inductor pack having a first inductor and a second inductor; a top PCB (Printed Circuit Board) on top of the inductor pack; and a first power device chip and a second power device chip on top of the top PCB, wherein the first power device chip has at least one pin electrically connected to the first inductor via the top PCB, and the second power device chip has at least one pin electrically connected to the second inductor via the top PCB; wherein each inductor comprises one winding having a first end and a second end, and wherein at least one of the first end and the second end of each winding is bent to and extended at a plane perpendicular to an axis along a length of the winding.

Abstract: A sandwich structure power supply module, having: an inductor pack having at least one inductor; a top PCB (Printed Circuit Board) on top of the inductor pack; and at least one power device chip on top of the top PCB, wherein each one of the power device chips has at least one pin connected to an associated inductor via the top PCB; wherein the inductor pack is wrapped with metal layers, wherein each two metal layers are lied against to a same surface of the inductor pack, with an isolation layer in between, and wherein the two metal layers are connected to different potentials.

Abstract: A reliable short-circuit protection scheme for all switching power devices is presented. This protection scheme includes an ultra-fast short-circuit detection component to quickly detect that a short-circuit may be occurring, a voltage clamping component to prevent short-term damage to the device, and a detection component that performs a system safe shutdown of the device in the event that a conventional slow over-current detection procedure verifies the short-circuit. This protection scheme can be applied to all switching devices and is especially suitable for wide bandgap (WBG) power devices which features high di/dt and high dv/dt switching capability. This protection scheme features reliable detection and protection, easy implementation, and low cost.

Abstract: A low inductance power module with low power loop inductance and high-power density is provided. The power module may include a vertical power loop structure, a cooling layer, and a thermal dissipation structure. The vertical power loop structure may utilize a substrate bottom conduction layer for electrical conduction. The thermal dissipation structure may be disposed between the substrate bottom conduction layer and the cooling layer. The vertical power loop structure may include integrated decoupling capacitors. Alternatively, the structure may include no integrated decoupling capacitors. The vertical power loop structure may include one or more half-bridge structures connected in parallel, each with its own integrated decoupling capacitors. The vertical power loop structure reduces power loop inductance in the power module, and the thermal dissipation structure provides electrical insulation, mechanical support, and thermal conduction.