Abstract: A cell assembly, a battery module, and a battery pack are provided. The cell assembly includes a cell including a cell body, where a first end surface of the cell body is arranged with an electrode post protruding outward, and an insulating ring is arranged between the first end surface and the electrode post; and a sealed insulating unit including a sealed insulating cover sealingly connected between the first end surface and the electrode post and covering the insulating ring.

Abstract: A battery pack including multiple cells, a housing, and a support structure is provided. Each cell has a cell explosion-proof valve, and the surface where the cell explosion-proof valve of each cell is located is defined as a first cell end surface. The cells are all disposed in the housing. The support structure is at least partially disposed between an inner surface of the housing and the cells to define an exhaust channel between the support structure and the inner surface of the housing. The cells are disposed on the support structure, and the first cell end surface faces the support structure. The support structure is provided with an exhaust vent corresponding to the cell explosion-proof valves, and the exhaust vent is communicated with the exhaust channel. A sidewall of the support structure near the first cell end surface is provided with an adhesive storage groove.

Abstract: Disclosed is a battery pack, including: multiple cells; a casing, wherein the inner bottom surface of the casing has a stepped surface for dividing the inner bottom surface of the casing into at least two placement areas having a height difference in the height direction of the casing, and the cells are placed in each of the placement areas. With stepped surfaces disposed on the inner bottom surface of the casing, the battery pack provided by the present disclosure may form at least two placement areas with height differences within the casing, making it possible to provide a force to the adhesive located in the placement area with a higher height, helping the adhesive flow toward the placement area with lower height. This helps improve the fluidity of the adhesive within the casing, and making it easier for the adhesive to fully fill various areas of the casing.

Abstract: Disclosed is a battery pack, including: a casing, the casing having an exhaust channel; multiple cells, the multiple cells being all disposed in the casing, and the gas discharged from the cell being adaptable to be discharged out of the casing through the exhaust channel; an intercepting structure, disposed in the exhaust channel, the intercepting structure having an intercepting surface, the intercepting surface being configured to intercept particles mixed in the gas discharged from the cell. By setting an intercepting structure in the exhaust channel of the casing, the battery pack provided by the present disclosure may intercept the particles in the gas sprayed from the cell when the cell experiences thermal runaway, thereby preventing the particles from continuing to flow with the gas in the casing, preventing the particles from causing adverse effects on the devices in the battery pack and blocking the casing explosion-proof valve.

Abstract: A conversation agent is described. An example method includes receiving a user request from a user interface of a conversation agent; determining a predicted intent of the user request; selecting a prompt template from a plurality of prompt templates corresponding to respective intents based on the predicted intent of the user request; generating a prompt using the prompt template and the user request; processing the prompt using a generative language model to generate an output; and displaying, on the user interface, a response to the user request generated based on the output.

Abstract: The present disclosure discloses a method for processing man-machine dialogues, which includes: acquiring a first user voice message from a client; determining a dialogue intent corresponding to the first user voice message; determining a target duplex wake-up mode corresponding to the dialogue intent based on an intent wake-up mode table, wherein the intent-wake mode table includes duplex wake-up modes corresponding to a plurality of candidate dialogue intents respectively, and the duplex wake-up modes comprise a full-duplex wake-up mode and a half-duplex wake-up mode; and sending a wake-up mode instruction corresponding to the target duplex wake-up mode to the client, such that the client processes the first user voice message according to the target duplex wake-up mode. Using the method and apparatus for carrying out the method, the wake-up mode of the client may be switched dynamically.

Abstract: A method of processing claim data includes: performing word segmentation for each piece of returning description information to obtain at least one claim word; determining at least one material claim word in the claim word; selecting at least one problem description claim word having a description relationship with each material claim word in the claim word; determining the number of association times that each problem description claim word is associated with the corresponding material claim word according to the description relationship between the problem description claim word and the corresponding material claim word; generating uploading verification logic for performing an uploading verification to the claim material according to each material claim word and the corresponding problem description claim word whose number of association times is above a preset threshold; adding the uploading verification logic to claim application page logic.

Abstract: A power battery pack, includes first housing includes a first main portion having a first fixing surface and a first connection surface; a number of first receiving portions extending upwardly from the first fixing surface; a number of first limiting portions extending upwardly from the first connection surface; a second housing comprising a second main portion having a second fixing surface and a second connection surface; a number of second receiving portions extending upwardly from the second fixing surface; a number of second limiting portions extending upwardly from the second connection surface; a number of single batteries; two ends of each single battery being received in a first receiving portion and a respective second receiving portion; two electrode board assemblies respectively received in a first limiting portion; and a number of intermediate board assemblies each received in a first limiting portion or a second limiting portion.

Abstract: A graphics card, a multi-screen display system and a synchronous display method are disclosed. The disclosed method includes the following steps. Firstly, first clock signals are provided in parallel in response to a first clock signal transferred from a motherboard. A second clock signal is generated according to one of the first clock signals that are provided in parallel, wherein the oscillation frequency of the first clock signals is larger than the oscillating frequency of the second clock signal. Then, a set of display clocks are generated based on the second clock signal. The set of display clocks control the display of a set of screens, for synchronous multi-screen display.

Abstract: The present invention provides an image/graphics data display mechanism for continuously displaying image/graphics data on multiple display devices of a computer that contains a system memory directly accessed by the computer's CPU during the CPU's power saving non-responding period, wherein there is provided sufficient system bandwidth, the mechanism of the present invention is independent on the resolution running on each display device and the number of display devices connected to the computer system. The mechanism provides two approaches to achieve continuous display of image/graphics data on multiple display devices computer system. In the first approach, a common clock source is used to coordinate display device horizontal synchronization signals, vertical synchronization signals, horizontal blank periods, and vertical blank periods. In the second approach, the mechanism has a control on the lengths and occurrences of the display device blank periods.

Abstract: An interface unit is described that comprises a buffer for storing captured video data generated by a three dimensional (3D) device intended for a 3D monitor. The interface unit further comprises a synchronization signal extractor configured to extract vertical synchronization (vsync) signals from the video data and a control signal unit configured to derive control signals for a viewing device based on the stored vsync signals. The interface unit transmits the control signals to the viewing device.

Abstract: A graphics card, a multi-screen display system and a synchronous display method are disclosed. The disclosed method includes the following steps. Firstly, first clock signals are provided in parallel in response to a first clock signal transferred from a motherboard. A second clock signal is generated according to one of the first clock signals that are provided in parallel, wherein the oscillation frequency of the first clock signals is larger than the oscillating frequency of the second clock signal. Then, a set of display clocks are generated based on the second clock signal. The set of display clocks control the display of a set of screens, for synchronous multi-screen display.

Abstract: An interface unit is described that comprises a buffer for storing captured video data generated by a three dimensional (3D) device intended for a 3D monitor. The interface unit further comprises a synchronization signal extractor configured to extract vertical synchronization (vsync) signals from the video data and a control signal unit configured to derive control signals for a viewing device based on the stored vsync signals. The interface unit transmits the control signals to the viewing device.

Abstract: The present invention provides an image/graphics data display mechanism for continuously displaying image/graphics data on dual display devices of a computer that contains a Display FIFO and a system memory directly accessed by the computer's CPU, wherein at least one of the display devices is running in a low-resolution mode, the mechanism comprising: determining which of the display devices is running in the low-resolution mode; receiving a power saving signal from the CPU; requesting an access to the system memory, and pre-storing the image/graphics data for the low-resolution device into the Display FIFO; and triggering the CPU power saving process according to a display timing scheme of the other display device.

Abstract: A mechanism is disclosed for adjusting one or more operational parameters of a component in such a way that the adjustment has minimal impact on graphics display. When a component (e.g. a processor) wishes to adjust one or more of its operational parameters (e.g. operating clock frequency), it submits a request to a graphics processing mechanism (GPM). In response, the GPM, which controls multiple displays, sends a response to the component at a proper time to cause the component to adjust the operational parameter during a time period in which a first display and a second display are both experiencing a blank period. By coordinating the timing of the adjustment in this way, it is possible to keep the size of a video memory to a minimum.

Abstract: An uninterrupted data display method for a computer system having a system memory directly accessed by a processor, for preventing disrupted data display from transmission break is disclosed. The method is accomplished before the processor goes into a non-responding period due to an execution of an economical process. The method includes the steps of: (i) providing a data storage device having a depth for storing a period long of data. (ii) Comparing the period of said depth to the non-responding period, if the period of said depth is longer than the non-responding period, jump to step (iii), otherwise, to step (iv). (iii) Loading the period long of data from a system memory into the data storage device then jump to step (v). (iv) Detecting a synchronization pulse then jump to step (v), wherein step (v) is to be accomplished within a non-display period, and, (v) executing the economical process.

Abstract: A mechanism is disclosed for adjusting one or more operational parameters of a component in such a way that the adjustment has minimal impact on graphics display. When a component (e.g. a processor) wishes to adjust one or more of its operational parameters (e.g. operating clock frequency), it submits a request to a graphics processing mechanism (GPM). In response, the GPM, which controls multiple displays, sends a response to the component at a proper time to cause the component to adjust the operational parameter during a time period in which a first display and a second display are both experiencing a blank period. By coordinating the timing of the adjustment in this way, it is possible to keep the size of a video memory to a minimum.

Abstract: The present invention provides an image/graphics data display mechanism for continuously displaying image/graphics data on multiple display devices of a computer that contains a system memory directly accessed by the computer's CPU during the CPU's power saving non-responding period, wherein there is provided sufficient system bandwidth, the mechanism of the present invention is independent on the resolution running on each display device and the number of display devices connected to the computer system. The mechanism provides two approaches to achieve continuous display of image/graphics data on multiple display devices computer system. In the first approach, a common clock source is used to coordinate display device horizontal synchronization signals, vertical synchronization signals, horizontal blank periods, and vertical blank periods. In the second approach, the mechanism has a control on the lengths and occurrences of the display device blank periods.

Abstract: An uninterrupted data display method for a computer system having a system memory directly accessed by a processor, for preventing disrupted data display from transmission break is disclosed. The method is accomplished before the processor goes into a non-responding period due to an execution of an economical process. The method includes the steps of: (i) providing a data storage device having a depth for storing a period long of data. (ii) Comparing the period of said depth to the non-responding period, if the period of said depth is longer than the non-responding period, jump to step (iii), otherwise, to step (iv). (iii) Loading the period long of data from a system memory into the data storage device then jump to step (v). (iv) Detecting a synchronization pulse then jump to step (v), wherein step (v) is to be accomplished within a non-display period, and, (v) executing the economical process.

Abstract: The present invention provides an image/graphics data display mechanism for continuously displaying image/graphics data on dual display devices of a computer that contains a Display FIFO and a system memory directly accessed by the computer's CPU, wherein at least one of the display devices is running in a low-resolution mode, the mechanism comprising: determining which of the display devices is running in the low-resolution mode; receiving a power saving signal from the CPU; requesting an access to the system memory, and pre-storing the image/graphics data for the low-resolution device into the Display FIFO; and triggering the CPU power saving process according to a display timing scheme of the other display device.