Abstract: At least one embodiment of the present disclosure provides a pixel arrangement structure, a display panel and a display device, the first display unit includes one first sub-pixel, one second sub-pixel and one third sub-pixel, the second display unit includes one first sub-pixel, two second sub-pixels and two third sub-pixels disposed around the one first sub-pixel, and the first display unit and the second display unit share a common first sub-pixel, the second sub-pixel in the first display unit is one of the two second sub-pixels in the second display unit, and the third sub-pixel in the first display unit is one of the two third sub-pixels in the second display unit; and the two second sub-pixels and the two third sub-pixels included in the second display unit in one of the pixel groups are respectively shared with four adjacent pixel groups.

Abstract: The disclosure provides a pixel array and a display device. The pixel array includes a plurality of sub-pixels, each of which has a virtual pixel center, the plurality of sub-pixels include first sub-pixels, second sub-pixels, and third sub-pixels; virtual centers of two first sub-pixels and two third sub-pixels are sequentially connected to form a second virtual quadrangle; a first virtual polygon includes four second virtual quadrangles in an array and sharing adjacent sides; and the first sub-pixels and the third sub-pixels are at vertex angles or sides of the first virtual polygon and are alternately on the vertex angles or the sides of the first virtual polygon along a clockwise direction; the first virtual polygon has a first virtual point, lines connecting the first virtual point and virtual centers of the four third sub-pixels on the first virtual polygon divide the first virtual polygon into four virtual isosceles trapezoids.

Abstract: A display substrate and a display apparatus. The display substrate comprises a base, and a plurality of sub-pixels, a driving circuit layer and a pixel definition layer, which are arranged on the base, wherein the driving circuit layer is located between the base and the pixel definition layer, a plurality of pixel openings are formed in the pixel definition layer, and each sub-pixel comprises at least one pixel opening; and a plurality of types of sub-pixels among the plurality of sub-pixels at least comprise a first sub-pixel and a second sub-pixel, the area of a pixel opening of the first sub-pixel is smaller than the area of a pixel opening of the second sub-pixel, and the pixel opening and the pixel opening of the second sub-pixel overlap at least one conductive layer in the driving circuit layer.

Abstract: In a displaying base board, each pixel unit includes three sub-pixels. The centers of the first sub-pixel, the second sub-pixel and the third sub-pixel are sequentially located at the vertex positions of a virtual triangle. The connecting line between the center of the first sub-pixel and the center of any one of the other sub-pixels in the same one pixel unit has an included angle with at least one of a first direction and a second direction, which are the directions of extension of the same one queue of the first sub-pixels and intersect. Both of more than a half of the region of the second sub-pixel and at least a half of the region of the third sub-pixel in the same one pixel unit are located on the same one side of the connecting line of the centers of the same one queue of the first sub-pixels.

Abstract: A display panel (10), comprising a plurality of pixel units (12) arranged in an array, each pixel unit (12) comprising one first sub-pixel (122), one second sub-pixel (124) and two third sub-pixels (126) located in a virtual hexagon; the first sub-pixel (122) is adjacent to the second sub-pixel (124), and the two third sub-pixels (126) are both adjacent to the first sub-pixel (122) and the second sub-pixel (124); and pixel units (12) adjacent in the column extension direction share the first sub-pixel (122) and the second sub-pixel (124), and pixel units (12) adjacent in a row extension direction share one third sub-pixel (126). The present application further discloses a mask assembly and a display device.

Abstract: A displaying base plate and a display panel are provided by the present application. The displaying base plate includes a substrate, and a plurality of pixel units that are located within an active area of the substrate and are arranged in an array, and each of at least some of the pixel units includes two first sub-pixels, two second sub-pixels and at least one third sub-pixel; the two first sub-pixels are located at a same pair of diagonal-corner positions of a virtual quadrilateral, and the two second sub-pixels are located at the other pair of diagonal-corner positions of the virtual quadrilateral; and an orthographic projection of the third sub-pixel on the substrate and a region circled by an orthographic projection of the virtual quadrilateral on the substrate at least partially overlap.

Abstract: The present disclosure provides a display substrate and a display device. The display substrate comprises: a base substrate having a first display area and a second display area located on at least one side of the first display area, the transmittance of the first display area being greater than that of the second display area; a plurality of light-emitting components arranged in an array on the base substrate, the plurality of light-emitting components comprising a plurality of first light-emitting components located in the first display area and a plurality of second light-emitting components located in the second display area, the gap between each two adjacent first light-emitting components being greater than the gap between each two adjacent second light-emitting components.

Abstract: A display substrate and a display apparatus. The display substrate includes a plurality of sub-pixels located on a base substrate: a shape of an orthographic projection of at least one sub-pixel on the base substrate includes a first shape, which includes a first bending edge and a second bending edge; two ends of the first bending edge are respectively connected to two ends of the second bending edge, so as to form a first connection point and a second connection point; length of a first connection line between the first connection point and the second connection point is the maximum length of the first shape, and the first shape is divided by the first connection line into a first sub-part and a second sub-part; and the area of the first sub-part is greater than the area of the second sub-part.

Abstract: The disclosure provides a pixel array and a display device. The pixel array includes a plurality of sub-pixels, each of which has a virtual pixel center, the plurality of sub-pixels include first sub-pixels, second sub-pixels, and third sub-pixels; virtual centers of two first sub-pixels and two third sub-pixels are sequentially connected to form a second virtual quadrangle; a first virtual polygon includes four second virtual quadrangles in an array and sharing adjacent sides; and the first sub-pixels and the third sub-pixels are at vertex angles or sides of the first virtual polygon and are alternately on the vertex angles or the sides of the first virtual polygon along a clockwise direction; the first virtual polygon has a first virtual point therein, lines connecting the first virtual point and virtual centers of the four third sub-pixels on the first virtual polygon divide the first virtual polygon into four virtual isosceles trapezoids.

Abstract: A display substrate, a mask assembly and a display panel are provided. The display substrate includes: pixel units arranged in an array and including first pixel units and second pixel units, where, in a row direction, the first pixel units and the second pixel units are alternately arranged; in a column direction, the first pixel units and the second pixel units are alternately arranged; the first pixel unit includes a first sub-pixel, two second sub-pixels, and a third sub-pixel in a virtual quadrilateral; the second pixel unit includes a first sub-pixel, two second sub-pixels, and a third sub-pixel in a virtual hexagon; where adjacent first pixel unit and second pixel unit in the column direction share a first sub-pixel or a third sub-pixel, and adjacent first pixel unit and second pixel unit in the row direction share a second sub-pixel.

Abstract: A display panel (10), comprising a plurality of pixel units (12) arranged in an array, each pixel unit (12) comprising one first sub-pixel (122), one second sub-pixel (124) and two third sub-pixels (126) located in a virtual hexagon; the first sub-pixel (122) is adjacent to the second sub-pixel (124), and the two third sub-pixels (126) are both adjacent to the first sub-pixel (122) and the second sub-pixel (124); and pixel units (12) adjacent in the column extension direction share the first sub-pixel (122) and the second sub-pixel (124), and pixel units (12) adjacent in a row extension direction share one third sub-pixel (126). The present application further discloses a mask assembly and a display device.

Abstract: The disclosure provides a pixel array and a display device. The pixel array includes a plurality of sub-pixels, each of which has a virtual pixel center, the plurality of sub-pixels include first sub-pixels, second sub-pixels, and third sub-pixels; virtual centers of two first sub-pixels and two third sub-pixels are sequentially connected to form a second virtual quadrangle; a first virtual polygon includes four second virtual quadrangles in an array and sharing adjacent sides; and the first sub-pixels and the third sub-pixels are at vertex angles or sides of the first virtual polygon and are alternately on the vertex angles or the sides of the first virtual polygon along a clockwise direction; the first virtual polygon has a first virtual point therein, lines connecting the first virtual point and virtual centers of the four third sub-pixels on the first virtual polygon divide the first virtual polygon into four virtual isosceles trapezoids.