Abstract: A display panel is provided. The display panel includes a base substrate; a separation structure on the base substrate; a recess extending into the separation structure; a color filter on a side of the separation structure away from the base substrate; and a lens layer including a plurality of lenses and on a side of the color filter away from the base substrate. An orthographic projection of a respective lens on the base substrate partially overlaps with an orthographic projection of the separation structure on the base substrate. The recess includes a first recess portion and a second recess portion connected with each other. In plan view of the display panel, a gap between two adjacent lenses of the plurality of subpixels is in a region at least partially overlapping with a region having both the first recess portion and the second recess portion.

Abstract: A display substrate includes an underlay substrate, and a first semiconductor layer, first conductive layer, second semiconductor layer, second conductive layer, and third conductive layer which are arranged on the underlay substrate. The first semiconductor layer includes an active layer of at least one transistor of a second semiconductor type of a shift register unit. The first conductive layer includes a control electrode of the at least one transistor of the second semiconductor type and a first electrode of at least one capacitor of the shift register unit. The second semiconductor layer includes an active layer of at least one transistor of a first semiconductor type of the shift register unit. The second conductive layer includes a control electrode of the at least one transistor of the first semiconductor type and a second electrode of the at least one capacitor of the shift register unit.

Abstract: Provided in the present disclosure are a light-emitting substrate and a display apparatus. The light-emitting substrate includes: a driving backplane; a plurality of light-emitting chips, arranged on the driving backplane in an array, where the light-emitting chip includes a buffer layer, an N-type semiconductor layer, a multi-quantum well layer, and a P-type semiconductor layer sequentially arranged on the driving backplane in a stacked manner; and a grating structure, on a side of the plurality of light-emitting chips facing away from the driving backplane, where the grating structure has a plurality of regions, and the regions are configured to transmit light of different wavelength bands.

Abstract: A touch structure includes a metal mesh including a plurality of metal conductive lines. The metal mesh has a plurality of openings, each opening is enclosed by metal conductive lines, and a shape of each opening is asymmetric.

Abstract: Embodiments of the disclosure provide a touch structure, a display substrate and a display panel, where the touch structure includes: a metal mesh including a plurality of metal wires, where the metal mesh has a plurality of openings, each of the openings is surrounded by a plurality of metal wires, and the plurality of metal wires surrounding each of the openings have at least three different extending directions.

Abstract: A shift register unit includes an input circuit, a first control circuit, a second control circuit, and an output circuit. The input circuit is configured to provide a signal of a first clock signal line or a first power line to a first control node. The first control circuit is configured to provide a signal of the first power line or a second power line to a first output terminal. The second control circuit is configured to provide a signal of the first power line or the second power line to a second output terminal. The output circuit is configured to output an effective level signal of the first power line or the second power line to a third output terminal.

Abstract: A display substrate includes an underlay substrate, and a first semiconductor layer, first conductive layer, second semiconductor layer, second conductive layer, and third conductive layer which are arranged on the underlay substrate. The first semiconductor layer includes an active layer of at least one transistor of a second semiconductor type of a shift register unit. The first conductive layer includes a control electrode of the at least one transistor of the second semiconductor type and a first electrode of at least one capacitor of the shift register unit. The second semiconductor layer includes an active layer of at least one transistor of a first semiconductor type of the shift register unit. The second conductive layer includes a control electrode of the at least one transistor of the first semiconductor type and a second electrode of the at least one capacitor of the shift register unit.

Abstract: A shift register unit includes an input circuit, a first control circuit, a second control circuit, and an output circuit. The input circuit is configured to provide a signal of a first clock signal line or a first power line to a first control node. The first control circuit is configured to provide a signal of the first power line or a second power line to a first output terminal. The second control circuit is configured to provide a signal of the first power line or the second power line to a second output terminal. The output circuit is configured to output an effective level signal of the first power line or the second power line to a third output terminal.

Abstract: A vapor deposition structure includes: a vapor deposition crucible, a nozzle and a floating plate. The vapor deposition crucible is configured to receive a vapor deposition source material, and the vapor deposition source material transitions from a liquid state to a gaseous state after being heated. The nozzle is disposed at an outlet of the vapor deposition crucible. The nozzle is configured to spray the vapor deposition source material in the gaseous state onto a surface of a substrate under vapor deposition. The floating plate is configured to float on a surface of the vapor deposition source material in the liquid state. The floating plate is provided with a plurality of hollowed-out structures. The plurality of hollowed-out structures are configured to allow the vapor deposition source material in the gaseous state to pass through.