Abstract: A shift register unit includes an input circuit, a first control circuit, a second control circuit, and an output circuit. The input circuit is configured to provide a signal of a first clock signal line or a first power line to a first control node. The first control circuit is configured to provide a signal of the first power line or a second power line to a first output terminal. The second control circuit is configured to provide a signal of the first power line or the second power line to a second output terminal. The output circuit is configured to output an effective level signal of the first power line or the second power line to a third output terminal.

Abstract: A display substrate includes an underlay substrate, and a first semiconductor layer, first conductive layer, second semiconductor layer, second conductive layer, and third conductive layer which are arranged on the underlay substrate. The first semiconductor layer includes an active layer of at least one transistor of a second semiconductor type of a shift register unit. The first conductive layer includes a control electrode of the at least one transistor of the second semiconductor type and a first electrode of at least one capacitor of the shift register unit. The second semiconductor layer includes an active layer of at least one transistor of a first semiconductor type of the shift register unit. The second conductive layer includes a control electrode of the at least one transistor of the first semiconductor type and a second electrode of the at least one capacitor of the shift register unit.

Abstract: A shift register unit includes an input circuit, a first control circuit, a second control circuit, and an output circuit. The input circuit is configured to provide a signal of a first clock signal line or a first power line to a first control node. The first control circuit is configured to provide a signal of the first power line or a second power line to a first output terminal. The second control circuit is configured to provide a signal of the first power line or the second power line to a second output terminal. The output circuit is configured to output an effective level signal of the first power line or the second power line to a third output terminal.

Abstract: A vapor deposition structure includes: a vapor deposition crucible, a nozzle and a floating plate. The vapor deposition crucible is configured to receive a vapor deposition source material, and the vapor deposition source material transitions from a liquid state to a gaseous state after being heated. The nozzle is disposed at an outlet of the vapor deposition crucible. The nozzle is configured to spray the vapor deposition source material in the gaseous state onto a surface of a substrate under vapor deposition. The floating plate is configured to float on a surface of the vapor deposition source material in the liquid state. The floating plate is provided with a plurality of hollowed-out structures. The plurality of hollowed-out structures are configured to allow the vapor deposition source material in the gaseous state to pass through.