Patents by Inventor Xinyu Zheng
Xinyu Zheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11948344Abstract: The present invention relates to the field of inland vessel identification and ranging technology, and discloses a method, system, medium, equipment and terminal for identifying and ranging inland vessels. In the stage of vessel identification, based on the classical YOLO-V4 network model, the MobileNetV1 network is used to replace the feature extraction network CSPDarknet53 of the YOLO-V4 model; In the stage of vessel ranging, a binocular stereo vision ranging model is established, and the FSRCNN is used for super-resolution reconstruction of the original image pairs to enhance the vessel feature information; the ORB algorithm is used to achieve feature detection and matching at the sub-pixel level to obtain the parallax value between image pairs, and the depth information of the vessel target is obtained by triangulation principle and coordinate conversion.Type: GrantFiled: May 29, 2023Date of Patent: April 2, 2024Assignee: Wuhan University of TechnologyInventors: Yuanzhou Zheng, Long Qian, Jingxin Cao, Xinyu Liu, Xuemeng Lv, Lei Li, Shiquan Qin
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Publication number: 20240088308Abstract: Embodiments of the present disclosure relates to the field of solar cells, and in particular to a solar cell and a photovoltaic module. The solar cell includes: a substrate having a front surface and a rear surface; a first tunnel layer and a first doped conductive layer sequentially formed over the front surface of the substrate, the first tunnel layer and the first doped conductive layer are each aligned with a metal pattern region on the front surface; and a second tunnel layer and a second doped conductive layer sequentially formed over the rear surface of the substrate, and in a respective Raman spectrum, a full width at half maximum corresponding to the first doped conductive layer is not greater than a full width at half maximum corresponding to the second doped conductive layer.Type: ApplicationFiled: November 2, 2022Publication date: March 14, 2024Inventors: Jie MAO, Zhao WANG, Peiting ZHENG, Jie YANG, Xinyu ZHANG
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Publication number: 20240088310Abstract: A photovoltaic cell is provided, including a substrate having a front surface with metal and non-metal pattern regions, first and second pyramid structures in each metal pattern region, third and fourth pyramid structures in each non-metal pattern region, a first tunneling layer and a first doped conductive layer on a portion of the front surface in a respective metal pattern region, and a second tunneling layer and a second doped conductive layer on a rear surface of the substrate. A dimension of a bottom portion of each first pyramid structure is greater than that of each second pyramid structure. A dimension of a bottom portion of each third pyramid structure is greater than that of each fourth pyramid structure. An area proportion of the first pyramid structures in the metal pattern region is greater than that of the third pyramid structures in a respective non-metal pattern region.Type: ApplicationFiled: October 5, 2022Publication date: March 14, 2024Inventors: Jie MAO, Zhao WANG, Peiting ZHENG, Jie YANG, Xinyu ZHANG
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Publication number: 20240088312Abstract: A photovoltaic cell is provided, including a substrate having a front surface with metal pattern regions and a rear surface, first pyramid structures in each metal pattern region, platform protrusion structures on the rear surface, a first tunneling layer and a first doped conductive layer on a portion of the front surface in a respective metal pattern region, and a second tunneling layer and a second doped conductive layer on the rear surface. A height of each first pyramid structure is greater than that of each platform protrusion structure. A one-dimensional dimension of a bottom portion of each first pyramid structure is less than that of each platform protrusion structure. A doping element type of the first doped conductive layer is the same as that of the substrate. A doping element type of the second doped conductive layer is different from that of the first doped conductive layer.Type: ApplicationFiled: September 19, 2023Publication date: March 14, 2024Inventors: Jie MAO, Zhao WANG, Peiting ZHENG, Jie YANG, Xinyu ZHANG
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Publication number: 20240088311Abstract: A photovoltaic cell is provided, including a substrate having a front surface with metal and non-metal pattern regions, first and second pyramid structures in each metal pattern region, third and fourth pyramid structures in each non-metal pattern region, a first tunneling layer and a first doped conductive layer on a portion of the front surface in a respective metal pattern region, and a second tunneling layer and a second doped conductive layer on a rear surface of the substrate. A dimension of a bottom portion of each first pyramid structure is greater than that of each second pyramid structure. A dimension of a bottom portion of each third pyramid structure is greater than that of each fourth pyramid structure. An area proportion of the first pyramid structures in the metal pattern region is greater than that of the third pyramid structures in a respective non-metal pattern region.Type: ApplicationFiled: September 13, 2023Publication date: March 14, 2024Inventors: Jie MAO, Zhao WANG, Peiting ZHENG, Jie YANG, Xinyu ZHANG
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Patent number: 11923468Abstract: A photovoltaic cell is provided, including a substrate having a front surface with metal and non-metal pattern regions, first and second pyramid structures in each metal pattern region, third and fourth pyramid structures in each non-metal pattern region, a first tunneling layer and a first doped conductive layer on a portion of the front surface in a respective metal pattern region, and a second tunneling layer and a second doped conductive layer on a rear surface of the substrate. A dimension of a bottom portion of each first pyramid structure is greater than that of each second pyramid structure. A dimension of a bottom portion of each third pyramid structure is greater than that of each fourth pyramid structure. An area proportion of the first pyramid structures in the metal pattern region is greater than that of the third pyramid structures in a respective non-metal pattern region.Type: GrantFiled: October 5, 2022Date of Patent: March 5, 2024Assignees: ZHEJIANG JINKO SOLAR CO., LTD., JINKO SOLAR CO., LTD.Inventors: Jie Mao, Zhao Wang, Peiting Zheng, Jie Yang, Xinyu Zhang
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Publication number: 20230419683Abstract: Provided are a method and system for automatic driving data collection and closed-loop management. The method includes: obtaining vehicle driving data; preprocessing the vehicle driving data; obtaining incremental data by filtering, through a pre-trained neural network based on a predetermined filtering rule, the preprocessed vehicle driving data; and storing the incremental data or transmitting the incremental data to a cloud. The method can effectively filter high-value incremental data, thereby reducing requirements for data storage volume and/or data transmission bandwidth of the system. The system of the present disclosure can be post-mounted or pre-mounted on a vehicle, and is independent of specific vehicle type of the vehicle. In addition, it is not necessary for the vehicle to be equipped with real-value systems such as high-cost laser radars, which greatly improves use convenience of the system and facilitates rapid and large-scale application.Type: ApplicationFiled: December 1, 2020Publication date: December 28, 2023Inventors: Yue HU, Kun DENG, Jianfeng ZHANG, Xinyu ZHENG
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Patent number: 11505199Abstract: A method for cleaning up vehicle driving data includes receiving vehicle driving data of a vehicle within a predetermined time period, the vehicle driving data comprising vehicle mileage data and vehicle status data; determining a first mileage of the vehicle within the predetermined time period based on the vehicle mileage data; determining a second mileage of the vehicle within the predetermined time period based on the vehicle status data; and judging whether the first mileage is abnormal data based on the second mileage.Type: GrantFiled: December 15, 2021Date of Patent: November 22, 2022Assignee: Zhiji Automotive Technology Co., Ltd.Inventors: Shiyi Fan, Wei Zhang, Gang Qian, Ruixue Wang, Fei Chen, Xinyu Zheng
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Patent number: 8805290Abstract: A method and system for over the air performance testing based on a multi-antenna system are disclosed. The method comprises: a branch device mapping path signals from a channel emulator to test antennas according to the set number of the combined sub-paths and sub-path mapping rule; the test antennas transmitting spatial signals according to the path signals from the branch device; and a device under test receiving the spatial signals; and an over the air performance analysis and display module analyzing and displaying the over the air performance of the device under test based on the spatial signals received by the device under test. The present invention implements the test of the over the air performance of a multi-antenna terminal.Type: GrantFiled: June 12, 2010Date of Patent: August 12, 2014Assignee: ZTE CorporationInventors: Yang Guo, Xinyu Zheng, Zhong Yu
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Publication number: 20130027256Abstract: The present invention discloses a method and system for testing OTA performance in a multi-antenna system. Multiple antennas are set in an anechoic chamber; a BS simulator is controlled to transmit benchmark test signal to DUT through a channel emulator and antennas; when determining the benchmark test signal does not meet set requirement, the benchmark test signal is adjusted until set requirement is met; corresponding test cases are determined according to different channel models; according to channel models, the channel emulator performs channel simulation processing on test signal output from the BS simulator and sends the test signal to DUT through antennas; after DUT receives the test signal, each OTA performance is tested according to OTA performance test items corresponding to test cases; and DUT is judged to reach the standard when all OTA performances reach the standard. The present invention is easy to implement and has a low cost.Type: ApplicationFiled: June 22, 2010Publication date: January 31, 2013Applicant: ZTE CORPORATIONInventors: Yang Guo, Xinyu Zheng, Zhong Yu
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Publication number: 20120309323Abstract: A method and system for over the air performance testing based on a multi-antenna system are disclosed. The method comprises: a branch device mapping path signals from a channel emulator to test antennas according to the set number of the combined sub-paths and sub-path mapping rule; the test antennas transmitting spatial signals according to the path signals from the branch device; and a device under test receiving the spatial signals; and an over the air performance analysis and display module analyzing and displaying the over the air performance of the device under test based on the spatial signals received by the device under test. The present invention implements the test of the over the air performance of a multi-antenna terminal.Type: ApplicationFiled: June 12, 2010Publication date: December 6, 2012Applicant: ZTE CorporationInventors: Yang Guo, Xinyu Zheng, Zhong Yu
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Patent number: 8022351Abstract: A photoelectronic device and an avalanche self-quenching process for a photoelectronic device are described. The photoelectronic device comprises a nanoscale semiconductor multiplication region and a nanoscale doped semiconductor quenching structure including a depletion region and an undepletion region. The photoelectronic device can act as a single photon detector or a single carrier multiplier. The avalanche self-quenching process allows electrical field reduction in the multiplication region by movement of the multiplication carriers, thus quenching the avalanche.Type: GrantFiled: February 12, 2009Date of Patent: September 20, 2011Assignee: California Institute of TechnologyInventors: Xinyu Zheng, Thomas J. Cunningham, Bedabrata Pain
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Patent number: 7928533Abstract: An avalanche photodiode with a nano-scale reach-through structure comprising n-doped and p-doped regions, formed on a silicon island on an insulator, so that the avalanche photodiode may be electrically isolated from other circuitry on other silicon islands on the same silicon chip as the avalanche photodiode. For some embodiments, multiplied holes generated by an avalanche reduces the electric field in the depletion region of the n-doped and p-doped regions to bring about self-quenching of the avalanche photodiode. Other embodiments are described and claimed.Type: GrantFiled: August 14, 2008Date of Patent: April 19, 2011Assignee: California Institute of TechnologyInventors: Xinyu Zheng, Bedabrata Pain, Thomas J. Cunningham
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Publication number: 20090309648Abstract: A photoelectronic device and an avalanche self-quenching process for a photoelectronic device are described. The photoelectronic device comprises a nanoscale semiconductor multiplication region and a nanoscale doped semiconductor quenching structure including a depletion region and an undepletion region. The photoelectronic device can act as a single photon detector or a single carrier multiplier. The avalanche self-quenching process allows electrical field reduction in the multiplication region by movement of the multiplication carriers, thus quenching the avalanche.Type: ApplicationFiled: February 12, 2009Publication date: December 17, 2009Inventors: Xinyu Zheng, Thomas J. Cunningham, Bedabrata Pain
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Publication number: 20090152681Abstract: An avalanche photodiode with a nano-scale reach-through structure comprising n-doped and p-doped regions, formed on a silicon island on an insulator, so that the avalanche photodiode may be electrically isolated from other circuitry on other silicon islands on the same silicon chip as the avalanche photodiode. For some embodiments, multiplied holes generated by an avalanche reduces the electric field in the depletion region of the n-doped and p-doped regions to bring about self-quenching of the avalanche photodiode. Other embodiments are described and claimed.Type: ApplicationFiled: August 14, 2008Publication date: June 18, 2009Applicant: California Institute of TechnologyInventors: Xinyu Zheng, Bedabrata Pain, Thomas J. Cunningham
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Patent number: 6838301Abstract: Active pixel sensors for a high quality imager are fabricated using a silicon-on-insulator (SOI) process by integrating the photodetectors on the SOI substrate and forming pixel readout transistors on the SOI thin-film. The technique can include forming silicon islands on a buried insulator layer disposed on a silicon substrate and selectively etching away the buried insulator layer over a region of the substrate to define a photodetector area. Dopants of a first conductivity type are implanted to form a signal node in the photodetector area and to form simultaneously drain/source regions for a first transistor in at least a first one of the silicon islands. Dopants of a second conductivity type are implanted to form drain/source regions for a second transistor in at least a second one of the silicon islands. Isolation rings around the photodetector also can be formed when dopants of the second conductivity type are implanted.Type: GrantFiled: April 30, 2002Date of Patent: January 4, 2005Assignee: California Institute of TechnologyInventors: Xinyu Zheng, Bedabrata Pain
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Publication number: 20020121655Abstract: Active pixel sensors for a high quality imager are fabricated using a silicon-on-insulator (SOI) process by integrating the photodetectors on the SOI substrate and forming pixel readout transistors on the SOI thin-film. The technique can include forming silicon islands on a buried insulator layer disposed on a silicon substrate and selectively etching away the buried insulator layer over a region of the substrate to define a photodetector area. Dopants of a first conductivity type are implanted to form a signal node in the photodetector area and to form simultaneously drain/source regions for a first transistor in at least a first one of the silicon islands. Dopants of a second conductivity type are implanted to form drain/source regions for a second transistor in at least a second one of the silicon islands. Isolation rings around the photodetector also can be formed when dopants of the second conductivity type are implanted.Type: ApplicationFiled: April 30, 2002Publication date: September 5, 2002Applicant: California Institute of TechnologyInventors: Xinyu Zheng, Bedabrata Pain
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Patent number: 6380572Abstract: Active pixel sensors for a high quality imager are fabricated using a silicon-on-insulator (SOI) process by integrating the photodetectors on the SOI substrate and forming pixel readout transistors on the SOI thin-film. The technique can include forming silicon islands on a buried insulator layer disposed on a silicon substrate and selectively etching away the buried insulator layer over a region of the substrate to define a photodetector area. Dopants of a first conductivity type are implanted to form a signal node in the photodetector area and to form simultaneously drain/source regions for a first transistor in at least a first one of the silicon islands. Dopants of a second conductivity type are implanted to form drain/source regions for a second transistor in at least a second one of the silicon islands. Isolation rings around the photodetector also can be formed when dopants of the second conductivity type are implanted.Type: GrantFiled: October 7, 1999Date of Patent: April 30, 2002Assignee: California Institute of TechnologyInventors: Bedabrata Pain, Xinyu Zheng
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Patent number: 5965931Abstract: A bipolar transistor includes multiple coupled delta layers in the base region between the emitter and collector regions to enhance carrier mobility and conductance. The delta layers can be varied in number, thickness, and dopant concentration to optimize desired device performance and enhanced mobility and conductivity vertically for emitter to collector and laterally parallel to the delta-doped layers. The transistors can be homojunction devices or heterojunction devices formed in either silicon or III-V semiconductor material.Type: GrantFiled: September 15, 1994Date of Patent: October 12, 1999Assignee: The Board of Regents of the University of CaliforniaInventors: Kang L. Wang, Timothy K. Carns, Xinyu Zheng
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Patent number: 5684737Abstract: A static random access memory (SRAM) cell includes a bistable diode and a load device serially connectable between two voltage potentials (VDD, Ground) with a gate device (field effect transistor) connected between a bit line and a common terminal of the bistable diode and load device and a control terminal of the gate device connected to a word line. The bistable diode includes a GeSi structure between a p-doped semiconductor region and a spaced n-doped semiconductor region. The GeSi structure can be a GeSi/Si superlattice and a .delta.-doped tunnel junction, a Ge.sub.x Si.sub.1-x multiple well structure, or a .delta.-doped tunnel junction.Type: GrantFiled: December 8, 1995Date of Patent: November 4, 1997Assignee: The Regents of the University of CaliforniaInventors: Kang L. Wang, Xinyu Zheng, Timothy K. Carns