Patents by Inventor XINYUAN LIN

XINYUAN LIN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250022547
    Abstract: A molecule generation method and a related apparatus are provided. The molecule generation method includes: receiving a constraint condition entered by a user on a terminal, where the constraint condition indicates a condition that a property of a molecule needs to meet, and the property of the molecule includes any one or more of a molecular weight, water solubility, lipid solubility, bioactivity, synthesizability, a docking binding affinity for a specific molecule, a similarity to a source molecule, an included specific substructure, pharmacokinetics, and toxicity of the molecule; generating a first molecule set based on the constraint condition, where the first molecule set includes one or more molecules; and returning information about the one or more molecules in the first molecule set to the terminal. The molecule generation method is used to generate molecules, to improve efficiency and reduce costs such as time costs and manpower, material, and financial resources.
    Type: Application
    Filed: September 27, 2024
    Publication date: January 16, 2025
    Inventors: Nan Qiao, Xinyuan Lin, Ruiqing Pan, Zhaoping Xiong, Chunjie Wang
  • Publication number: 20230117417
    Abstract: The present disclosure discloses a novel magnesium phosphate-alkali activated composite cementitious material with rapid hardening, early strength, and high water resistance and a preparation method thereof. The composite cementitious material is a mixture system of a magnesium phosphate cementitious material interweaving and coexisting with an alkali-activated cementitious material, where the alkali-activated cementitious material is prepared by alkali activation of an activatable mineral using a hydration product of a high-alkalinity magnesium phosphate cementitious material prepared from an alkaline hydrophosphate. The composite cementitious material obtained ensures excellent mechanical properties while actively converting part of or all of air-hardening material components into a hydraulic material, so that the problem of poor water resistance of the magnesium phosphate cementitious material can be effectively solved.
    Type: Application
    Filed: October 18, 2022
    Publication date: April 20, 2023
    Inventors: Xujian LIN, Tao JI, Yongning LIANG, Hwaichung WU, Hongru ZHANG, Xinyuan LIN, Chenfeng LIN
  • Patent number: 10522619
    Abstract: The disclosed subject matter provides a method for fabricating a three-dimensional transistor. The method includes forming an active region and two isolation structures on a semiconductor substrate. The active region is formed between the two isolation structures. The method further includes forming a photoresist layer on the active region and the isolation structures, forming an opening in the photoresist layer to expose a top surface of the active region and a portion of a top surface of each isolation structure, and then forming a trench on each side of the active region by removing a portion of the corresponding isolation structure exposed in the opening through an etching process using the photoresist layer as an etch mask. After the etching process, the portion of the active region between the two trenches becomes a three-dimensional fin structure. The disclosed method simplifies fabrication process for three-dimensional transistors and reduces product cost.
    Type: Grant
    Filed: September 18, 2017
    Date of Patent: December 31, 2019
    Assignees: Semiconductor Manufacturing International (Beijing) Corporation, Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: Xinyuan Lin, Ying Jin
  • Publication number: 20180006112
    Abstract: The disclosed subject matter provides a method for fabricating a three-dimensional transistor. The method includes forming an active region and two isolation structures on a semiconductor substrate. The active region is formed between the two isolation structures. The method further includes forming a photoresist layer on the active region and the isolation structures, forming an opening in the photoresist layer to expose a top surface of the active region and a portion of a top surface of each isolation structure, and then forming a trench on each side of the active region by removing a portion of the corresponding isolation structure exposed in the opening through an etching process using the photoresist layer as an etch mask. After the etching process, the portion of the active region between the two trenches becomes a three-dimensional fin structure. The disclosed method simplifies fabrication process for three-dimensional transistors and reduces product cost.
    Type: Application
    Filed: September 18, 2017
    Publication date: January 4, 2018
    Inventors: XINYUAN LIN, YING JIN
  • Patent number: 9799728
    Abstract: The disclosed subject matter provides a method for fabricating a three-dimensional transistor. The method includes forming an active region and two isolation structures on a semiconductor substrate. The active region is formed between the two isolation structures. The method further includes forming a photoresist layer on the active region and the isolation structures, forming an opening in the photoresist layer to expose a top surface of the active region and a portion of a top surface of each isolation structure, and then forming a trench on each side of the active region by removing a portion of the corresponding isolation structure exposed in the opening through an etching process using the photoresist layer as an etch mask. After the etching process, the portion of the active region between the two trenches becomes a three-dimensional fin structure. The disclosed method simplifies fabrication process for three-dimensional transistors and reduces product cost.
    Type: Grant
    Filed: July 29, 2016
    Date of Patent: October 24, 2017
    Assignees: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION, SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION
    Inventors: Xinyuan Lin, Ying Jin
  • Publication number: 20170062560
    Abstract: The disclosed subject matter provides a method for fabricating a three-dimensional transistor. The method includes forming an active region and two isolation structures on a semiconductor substrate. The active region is formed between the two isolation structures. The method further includes forming a photoresist layer on the active region and the isolation structures, forming an opening in the photoresist layer to expose a top surface of the active region and a portion of a top surface of each isolation structure, and then forming a trench on each side of the active region by removing a portion of the corresponding isolation structure exposed in the opening through an etching process using the photoresist layer as an etch mask. After the etching process, the portion of the active region between the two trenches becomes a three-dimensional fin structure. The disclosed method simplifies fabrication process for three-dimensional transistors and reduces product cost.
    Type: Application
    Filed: July 29, 2016
    Publication date: March 2, 2017
    Inventors: XINYUAN LIN, YING JIN