Patents by Inventor Xiong-Jie Yu

Xiong-Jie Yu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9697165
    Abstract: A server system is described. The server system comprises first motherboard having first processor module coupled to first memory module, second motherboard having second processor module coupled to second memory module, first back plate having first PCIE switch chip coupled to second PCIE switch chip via PCIE transmission channel. The first processor module is coupled to the first PCIE switch chip and the second processor module is coupled to the second PCIE switch chip. The first processor module converts the memory data of the first memory module into PCIE packet data to be transmitted to the second processor module by first PCIE switch chip and second PCIE switch chip. The second processor module converts the received PCIE packet data into memory data of second memory module for synchronizing the memory data of first motherboard and the second motherboard.
    Type: Grant
    Filed: August 29, 2014
    Date of Patent: July 4, 2017
    Assignees: INVENTEC (PUDONG) TECHNOLOGY CORPORATION, INVENTEC CORPORATION
    Inventor: Xiong-Jie Yu
  • Patent number: 9641612
    Abstract: A virtualized fusion storage sub-system comprises a first server node; a second server node; and a common storage pool including a hard disk cluster. The first and the second server nodes simultaneously access the common storage pool. Said sub-system has an operation system installed thereon. A storage space unit is defined in the operation system. The first and the second server nodes access the hard disk cluster through the storage space unit so as to carry out synchronization of the first and the second server nodes, thereby assuring a storage redundancy configuration. The operation system has a file server and a virtual server arranged therein. The virtual server is correspondingly connected to the file server on a basis of stacking of application programs of the operation system so as to carry out rapidly match therebetween.
    Type: Grant
    Filed: October 6, 2014
    Date of Patent: May 2, 2017
    Assignee: INVENTEC (PUDONG) TECHNOLOGY CORPORATION
    Inventor: Xiong-Jie Yu
  • Patent number: 9535468
    Abstract: A server includes a storage module, a first expander board, a second expander board, a first mother board, and a second mother board. The storage module includes a plurality of storage units. The second mother board includes at least one second central processing unit. The plurality of storage units are coupled with the first expander board and the second expander board. The first expander board and the second expander board are coupled with the first mother board and the second mother board. When at least one of the first and the second mother board operates normally and at least one of the first and the second expander board operates normally, the at least normally-operating one of the first and the second mother board accesses the storage module through the at least normally-operating one of the first and the second expander board.
    Type: Grant
    Filed: September 18, 2014
    Date of Patent: January 3, 2017
    Assignees: INVENTEC (PUDONG) TECHNOLOGY CORPORATION, INVENTEC CORPORATION
    Inventor: Xiong-Jie Yu
  • Publication number: 20160041590
    Abstract: A server includes a storage module, a first expander board, a second expander board, a first mother board, and a second mother board. The storage module includes a plurality of storage units. The second mother board includes at least one second central processing unit. The plurality of storage units are coupled with the first expander board and the second expander board. The first expander board and the second expander board are coupled with the first mother board and the second mother board. When at least one of the first and the second mother board operates normally and at least one of the first and the second expander board operates normally, the at least normally-operating one of the first and the second mother board accesses the storage module through the at least normally-operating one of the first and the second expander board.
    Type: Application
    Filed: September 18, 2014
    Publication date: February 11, 2016
    Inventor: XIONG-JIE YU
  • Publication number: 20160028807
    Abstract: A virtualized fusion storage sub-system comprises a first server node; a second server node; and a common storage pool including a hard disk cluster. The first and the second server nodes simultaneously access the common storage pool. Said sub-system has an operation system installed thereon. A storage space unit is defined in the operation system. The first and the second server nodes access the hard disk cluster through the storage space unit so as to carry out synchronization of the first and the second server nodes, thereby assuring a storage redundancy configuration. The operation system has a file server and a virtual server arranged therein. The virtual server is correspondingly connected to the file server on a basis of stacking of application programs of the operation system so as to carry out rapidly match therebetween.
    Type: Application
    Filed: October 6, 2014
    Publication date: January 28, 2016
    Inventor: XIONG-JIE YU
  • Publication number: 20150370749
    Abstract: A server system is described. The server system comprises first motherboard having first processor module coupled to first memory module, second motherboard having second processor module coupled to second memory module, first back plate having first PCIE switch chip coupled to second PCIE switch chip via PCIE transmission channel. The first processor module is coupled to the first PCIE switch chip and the second processor module is coupled to the second PCIE switch chip. The first processor module converts the memory data of the first memory module into PCIE packet data to be transmitted to the second processor module by first PCIE switch chip and second PCIE switch chip. The second processor module converts the received PCIE packet data into memory data of second memory module for synchronizing the memory data of first motherboard and the second motherboard.
    Type: Application
    Filed: August 29, 2014
    Publication date: December 24, 2015
    Inventor: XIONG-JIE YU
  • Publication number: 20150362982
    Abstract: A server system and cluster system using the same. The server system includes power supply module for providing first operation power, an energy-storing module for providing a stored power, power management module coupled to power supply module and energy-storing module for receiving first operation power and providing a second operation power, or for receiving the stored power and providing a third operation power, at least one motherboard having internal memory module for receiving second operation power or third operation power, and an external memory module coupled to the at least one motherboard. The present invention retains the data in the memory and the operating messages while a power failure occurs suddenly in the server so that server system is capable of restoring the data and the operating messages before the power failure to simplify the system and reduce the cost.
    Type: Application
    Filed: August 29, 2014
    Publication date: December 17, 2015
    Inventor: XIONG-JIE YU
  • Patent number: 8522064
    Abstract: The present invention provides a server system comprising a first group of mainboard modules and a second group of mainboard modules, each of the first and second groups of mainboard modules including a plurality of mainboard modules. Each mainboard module includes a mainboard and a daughter board electrically connected to the mainboard; a first adaptor and a second adaptor; a hard disk array including a hard disk backplane and a plurality of hard disks, wherein the hard disk backplane is electrically connected to the first adaptor and the second adaptor; a first power control board and a second power control board respectively connected to at least one power supply, wherein the first power control board and the second power control board are electrically connected to the hard disk array; and a management board electrically connected to the first adaptor and the second adaptor.
    Type: Grant
    Filed: November 11, 2010
    Date of Patent: August 27, 2013
    Assignee: Inventec Corporation
    Inventors: Xiong-Jie Yu, Tsu-Cheng Lin
  • Patent number: 8397053
    Abstract: A multi-motherboard server system, having a management board and a plurality of motherboards, is disclosed. The multi-motherboard server system is applicable to a sever system. The management board has a BMC, and the motherboards are respectively connected to the management board. The BMC can transmit data to a far-end control system through sideband communication.
    Type: Grant
    Filed: February 3, 2010
    Date of Patent: March 12, 2013
    Assignee: Inventec Corporation
    Inventors: Cheng-Wei Li, Xiong-Jie Yu, Tsu-Cheng Lin
  • Patent number: 8386764
    Abstract: A BIOS architecture adapted in a computer system is provided. The BIOS architecture includes at least one BIOS, a programmable chip module, a baseboard management controller (BMC), a south bridge chip and a network interface controller (NIC). The NIC is connected to the south bridge chip and the BMC and is to receive a remote update data to determine the destination of the remote update data. When the destination of the remote update data is the south bridge chip, the south bridge chip updates the BIOS according to the remote update data. When the destination of the remote update data is the BMC, the NIC informs the BMC to receive the remote update data, such that the BMC controls the programmable chip module to update the BIOS according to the remote update data.
    Type: Grant
    Filed: January 18, 2010
    Date of Patent: February 26, 2013
    Assignee: Inventec Corporation
    Inventors: Cheng-Wei Li, Xiong-Jie Yu, Tsu-Cheng Lin
  • Publication number: 20120030492
    Abstract: The present invention provides a server system comprising a first group of mainboard modules and a second group of mainboard modules, each of the first and second groups of mainboard modules including a plurality of mainboard modules. Each mainboard module includes a mainboard and a daughter board electrically connected to the mainboard; a first adaptor and a second adaptor; a hard disk array including a hard disk backplane and a plurality of hard disks, wherein the hard disk backplane is electrically connected to the first adaptor and the second adaptor; a first power control board and a second power control board respectively connected to at least one power supply, wherein the first power control board and the second power control board are electrically connected to the hard disk array; and a management board electrically connected to the first adaptor and the second adaptor.
    Type: Application
    Filed: November 11, 2010
    Publication date: February 2, 2012
    Applicant: INVENTEC CORPORATION
    Inventors: Xiong-Jie YU, Tsu-Cheng LIN
  • Publication number: 20110191573
    Abstract: A multi-motherboard server system, having a management board and a plurality of motherboards, is disclosed. The multi-motherboard server system is applicable to a sever system. The management board has a BMC, and the motherboards are respectively connected to the management board. The BMC can transmit data to a far-end control system through sideband communication.
    Type: Application
    Filed: February 3, 2010
    Publication date: August 4, 2011
    Applicant: INVENTEC CORPORATION
    Inventors: Cheng-Wei LI, Xiong-Jie YU, Tsu-Cheng LIN
  • Publication number: 20110179211
    Abstract: A BIOS architecture adapted in a computer system is provided. The BIOS architecture includes at least one BIOS, a programmable chip module, a baseboard management controller (BMC), a south bridge chip and a network interface controller (NIC). The NIC is connected to the south bridge chip and the BMC and is to receive a remote update data to determine the destination of the remote update data. When the destination of the remote update data is the south bridge chip, the south bridge chip updates the BIOS according to the remote update data. When the destination of the remote update data is the BMC, the NIC informs the BMC to receive the remote update data, such that the BMC controls the programmable chip module to update the BIOS according to the remote update data.
    Type: Application
    Filed: January 18, 2010
    Publication date: July 21, 2011
    Applicant: INVENTEC CORPORATION
    Inventors: Cheng-Wei Li, Xiong-Jie Yu, Tsu-Cheng Lin