Abstract: The present disclosure provides a method and a device for transmitting and identifying a data mapping mode information. The method includes steps of acquiring a first data signal, selecting a mapping mode for transmitting the first data signal, and transmitting the first data signal and information about the mapping mode for transmitting the first data signal to a second terminal via an identical data line.

Abstract: An ultra high definition display device and a video signal converting method are provided. The ultra high definition display device comprises a first input port configured to receive a first signal; a control module configured to generate a first enabling signal; a first receiver module configured to receive the first signal from the first input port according to the first enabling signal, and generate a second signal by a format conversion, both the first signal and the second signal being full high definition signals; a resolution transformation module configured to transform the second signal in resolution to generate a third signal, the third signal being an ultra high definition signal; and a transmission module configured to convert the third signal into an ultra high definition display signal and output the display signal.

Abstract: There is provided an IC board and a display apparatus. Switching components (01; 02) are added between the internal interfaces (J1, J2 . . . Jn; j1, j2 . . . jn) corresponding to the backend data processing chips (U2; U3) and the frontend data processing chip (U1), or a switching component (02) is added between the internal interfaces (j 1, j2 . . . jn) corresponding to the backend data processing chip (U2) and another backend data processing chip (U3). The switching components (01; 02) can ensure normal signal transmission between the backend data processing chips (U2; U3) and the frontend data processing chip (U1) or between the backend data processing chips (U2; U2) when no external test signal is input into the internal interfaces, i.e., when the IC board operates normally; and interrupt the signal transmission between the backend data processing chips (U2; U3) and the frontend data processing chip (U1) or between the backend data processing chips (U2; U3) when the internal interfaces j1, j2 . . .

Abstract: The display processing system according to an embodiment of the present disclosure may include: at least one receiving module, configured to receive source three-dimensional (3D) display data for a source 3D display mode and transmitted in a source data transmission format; a first converting module, configured to convert the source 3D display data into source RGB data; a second converting module, configured to convert the source RGB data into target RGB data for a target 3D display mode; a third converting module, configured to convert the target RGB data into target 3D display data in a target data transmission format; and a transmitting module, configured to transmit the target 3D display data in the target data transmission format to a data driving circuit connected with a display panel.

Abstract: A frequency signal generating system comprises a digital phase-locked loop for receiving a source frequency signal; a loop filter for filtering out high frequency components of a signal output from the digital phase-locked loop; and a voltage controlled oscillator for outputting a target frequency signal according to a signal from the loop filter, wherein an output terminal of the voltage controlled oscillator is connected to a first output terminal of the digital phase-locked loop so that the target frequency signal output from the voltage controlled oscillator is fed back to the digital phase-locked loop, the digital phase-locked loop performs frequency-dividing and phase-detecting on the source frequency signal and the fed back target frequency signal so that the target frequency signal output from the voltage controlled oscillator and the source frequency signal satisfy a definite mathematical relationship therebetween.

Abstract: An ultra high definition display device and a video signal converting method are provided. The ultra high definition display device comprises a first input port configured to receive a first signal; a control module configured to generate a first enabling signal; a first receiver module configured to receive the first signal from the first input port according to the first enabling signal, and generate a second signal by a format conversion, both the first signal and the second signal being full high definition signals; a resolution transformation module configured to transform the second signal in resolution to generate a third signal, the third signal being an ultra high definition signal; and a transmission module configured to convert the third signal into an ultra high definition display signal and output the display signal.

Abstract: A frequency signal generating system comprises a digital phase-locked loop for receiving a source frequency signal; a loop filter for filtering out high frequency components of a signal output from the digital phase-locked loop; and a voltage controlled oscillator for outputting a target frequency signal according to a signal from the loop filter, wherein an output terminal of the voltage controlled oscillator is connected to a first output terminal of the digital phase-locked loop so that the target frequency signal output from the voltage controlled oscillator is fed back to the digital phase-locked loop, the digital phase-locked loop performs frequency-dividing and phase-detecting on the source frequency signal and the fed back, target frequency signal so that the target frequency signal output from the voltage controlled oscillator and the source frequency signal satisfy a definite mathematical relationship therebetween.