Abstract: A smart switch system comprising one or more switching devices. Each one of the switching devices include a first pin, a second pin, a current indication pin, a system current limit pin and a power switch for electrically coupling the first pin to the second pin when the power switch is turned on. Each switching device may adaptively adjust an operation current limit value of the switching device based on a system total current limit value received or set at the system current limit pin and a system current indication signal received at the current indication pin.

Abstract: An IC package structure including an array of package units formed into a panel-shaped package units array. Each package unit has a continuous and closed metal wall surrounding the periphery of the package unit and at least one IC chip/IC die disposed in the package unit, and wherein each IC chip/IC die has a top surface and a back surface opposite to the top surface. A panel-shaped metal layer corresponding to the panel-shaped package units array can be formed on entire back side of the IC package structure and bonded to the metal wall of each package unit, wherein the back side of the IC package structure refers to the side to which the back surface of each IC chip/IC die is facing.

Abstract: A panel-shaped metal wall grids array for panel level IC packaging and associated manufacturing method. Each metal wall grid in the metal wall grids array has a continuous and closed metal wall of a predetermined wall height. The metal wall grids are connected to form a monolithic panel through a plurality of metal connecting portions. When the panel-shaped metal wall grids array is used for panel level IC packaging, at least one IC chip/IC die is disposed in each metal wall grid with a top surface of each IC chip/IC die facing downwards, and a panel-shaped metal layer matching with the panel-shaped wall grids array may be further formed on the entire back side of the panel-shaped metal wall grids array so that the panel-shaped metal layer is bonded to the metal wall of each metal wall grid.

Abstract: An IC package structure and an IC package unit are disclosed. The IC package includes an array of metal wall grids formed into a panel, each one of the metal wall grids having a continuous and closed metal wall to surround an IC package unit with at least one IC chip/IC die disposed therein. Each IC chip/IC die has a top surface with a plurality of metal pads formed thereon. A panel-shaped metal layer is formed on entire back side of the panel of the array of metal wall grids and bonded to the metal wall of each metal wall grid. A panel-shaped rewiring substrate having a plurality of metal pillars is connected to each IC chip/IC die with each one of the plurality of metal pillars soldered with a corresponding one of the plurality of metal pads.

Abstract: A flip chip package unit and associated packaging method. The flip chip package unit may include an integrated circuit (“IC”) die having a plurality of metal pillars formed on its first surface and attached to a rewiring substrate with the first surface of the IC die facing to the rewiring substrate, an under-fill material filling gaps between the first surface of the IC die and the rewiring substrate, and a thermal conductive protection film covering or overlaying and directly contacting with the entire second die surface and a first portion of sidewalls of the IC die. The thermal conductive protection film may have good thermal conductivity, uneasy to fall off from the IC die and can provide physical protection, electromagnetic interference protection and effective heat dissipation path to the IC die.

Abstract: A flip chip package unit and associated packaging method. The flip chip package unit may include an integrated circuit (“IC”) die having a plurality of metal pillars formed on its first surface and attached to a rewiring substrate with the first surface of the IC die facing to the rewiring substrate, an under-fill material filling gaps between the first surface of the IC die and the rewiring substrate, and a back protective film attached to a second surface of the IC die. The back protective film may have good UV sensitivity to change from non-solid to solid after UV irradiation while maintaining its viscosity with the IC die not reduced after UV irradiation. The back protective film may be uneasy to deform and to peel off from the IC die and can provide physical protection and effective heat dissipation path to the IC die.

Abstract: A smart switch system comprising one or more switching devices. Each one of the switching devices include a first pin, a second pin, a current indication pin, a system current limit pin and a power switch for electrically coupling the first pin to the second pin when the power switch is turned on. Each switching device may adaptively adjust an operation current limit value of the switching device based on a system total current limit value received or set at the system current limit pin and a system current indication signal received at the current indication pin.

Abstract: An IC package structure including an array of package units formed into a panel-shaped package units array. Each package unit has a continuous and closed metal wall surrounding the periphery of the package unit and at least one IC chip/IC die disposed in the package unit, and wherein each IC chip/IC die has a top surface and a back surface opposite to the top surface. A panel-shaped metal layer corresponding to the panel-shaped package units array can be formed on entire back side of the IC package structure and bonded to the metal wall of each package unit, wherein the back side of the IC package structure refers to the side to which the back surface of each IC chip/IC die is facing.

Abstract: An IC package structure and an IC package unit are disclosed. The IC package includes an array of metal wall grids formed into a panel, each one of the metal wall grids having a continuous and closed metal wall to surround an IC package unit with at least one IC chip/IC die disposed therein. Each IC chip/IC die has a top surface with a plurality of metal pads formed thereon. A panel-shaped metal layer is formed on entire back side of the panel of the array of metal wall grids and bonded to the metal wall of each metal wall grid. A panel-shaped rewiring substrate having a plurality of metal pillars is connected to each IC chip/IC die with each one of the plurality of metal pillars soldered with a corresponding one of the plurality of metal pads.

Abstract: A panel-shaped metal wall grids array for panel level IC packaging and associated manufacturing method. Each metal wall grid in the metal wall grids array has a continuous and closed metal wall of a predetermined wall height. The metal wall grids are connected to form a monolithic panel through a plurality of metal connecting portions.