Abstract: Embodiments of the present invention provide a capacity station activation method and system. The method includes: A coverage station sends activation control information to a capacity station, where the activation control information is used to enable the capacity station to send a pilot signal to a user in a power increasing manner; receives a measurement result of measuring the pilot signal by the user; determines, according to the measurement result, a capacity station that needs to be activated to meet a system requirement; and sends activation information to a determined capacity station that needs to be activated to activate the capacity station. With the capacity station activation method and system in the embodiments of the present invention, a capacity station that needs to be activated can be determined more accurately, and furthermore, transmit power of an activated capacity station can be controlled, thereby reducing energy consumption of a whole system.

Abstract: An energy saving method, system and device for a base station, applied in the technical field of communications. The energy saving method comprises: if the number of user equipments sending a service request in the coverage of a coverage base station is greater than a first threshold, sending a second activation request to a capacity boosting base station, wherein the second activation request is used for requesting the capacity boosting base station in a dormant state to enter an intermediate state from the dormant state, and the intermediate state refers to that in the intermediate state, the capacity boosting base station bears a user equipment in a connected state rather than a user equipment in an idle state; and after the capacity boosting base station enters the intermediate state, transferring the user equipment to be connected to the capacity boosting base station in the intermediate state.

Abstract: A rail to rail differential buffer input stage includes n-type and p-type input differential transistor pairs connected in voltage follower configuration to the power supply rails. A reference voltage generator includes a reference differential transistor pair generating a dynamic reference voltage relative to the common mode input voltage. Dummy n-type and p-type transistor pairs have current conducting paths connected in parallel with the input differential pairs and are controlled by the dynamic reference voltage to divert supply rail current away from and deactivate one of the associated input differential pairs when the common mode input voltage is further from the dynamic reference voltage than a threshold value. Both the dummy pairs conduct and both the input differential pairs are activated when the common mode input voltage is closer to the dynamic reference voltage VB than the threshold value so that the overall transconductance of the buffer input stage remains constant.

Abstract: A rail to rail differential buffer input stage includes n-type and p-type input differential transistor pairs connected in voltage follower configuration to the power supply rails. A reference voltage generator includes a reference differential transistor pair generating a dynamic reference voltage relative to the common mode input voltage. Dummy n-type and p-type transistor pairs have current conducting paths connected in parallel with the input differential pairs and are controlled by the dynamic reference voltage to divert supply rail current away from and deactivate one of the associated input differential pairs when the common mode input voltage is further from the dynamic reference voltage than a threshold value. Both the dummy pairs conduct and both the input differential pairs are activated when the common mode input voltage is closer to the dynamic reference voltage VB than the threshold value so that the overall transconductance of the buffer input stage remains constant.

Abstract: A semiconductor trimming circuit includes parallel coupled PMOS devices coupled in parallel with parallel coupled NMOS devices and an additional pair of dummy NMOS devices. The dummy NMOS devices are coupled in parallel with the NMOS devices. A trimming circuit for an internal clock source may be formed with an array of such switches for selecting one or more trimming capacitors of the trimming circuit. Such an array has a low leakage current and permits good trimming linearity.

Abstract: An oscillator circuit generates a voltage signal. The magnitude of the voltage signal is measured and compared with predetermined upper and lower voltage signals by an internal test circuit. If the magnitude of the voltage signal is between the predetermined upper and lower voltage signals, then a pass test status signal is generated. If the magnitude of the voltage signal is not between the predetermined upper and lower voltage signals then a fail test status signal is generated.

Abstract: An oscillator circuit generates a voltage signal. The magnitude of the voltage signal is measured and compared with predetermined upper and lower voltage signals by an internal test circuit. If the magnitude of the voltage signal is between the predetermined upper and lower voltage signals, then a pass test status signal is generated. If the magnitude of the voltage signal is not between the predetermined upper and lower voltage signals then a fail test status signal is generated.

Abstract: An energy saving method, system and device for a base station are applicable to the field of communications technologies. The energy saving method for a base station includes: sending, by a coverage station or an OAM equipment, a second activation request to a capacity station in a second energy saving state under the coverage of the coverage station if it is detected that the load of the coverage station is higher than a preset value, so as to activate the capacity station to enter a first energy saving state. The energy saving system for a base station includes: a coverage station and at least one capacity station under the coverage of the coverage station. Another energy saving system for a base station includes: a coverage station, at least one capacity station under the coverage of the coverage station and an operations, administration and maintenance OAM equipment.

Abstract: Embodiments of the present invention provide a capacity station activation method and system. The method includes: A coverage station sends activation control information to a capacity station, where the activation control information is used to enable the capacity station to send a pilot signal to a user in a power increasing manner; receives a measurement result of measuring the pilot signal by the user; determines, according to the measurement result, a capacity station that needs to be activated to meet a system requirement; and sends activation information to a determined capacity station that needs to be activated to activate the capacity station. With the capacity station activation method and system in the embodiments of the present invention, a capacity station that needs to be activated can be determined more accurately, and furthermore, transmit power of an activated capacity station can be controlled, thereby reducing energy consumption of a whole system.

Abstract: Embodiments of the present invention provide a capacity station activation method and system. A coverage station sends activation control information to a capacity station, where the activation control information enables the capacity station to send a pilot signal to a user in a power decreasing manner; receives a pilot signal measurement result from the user; determines, according to the measurement result, a capacity station that needs to be activated to meet a system requirement; and sends activation information to the determined capacity station that needs to be activated. According to the capacity station activation method and system provided by the embodiments of the present invention, the capacity station that needs to be activated can be more accurately determined, transmit power of an activated capacity station can be controlled, and power consumption of an entire system can be reduced.

Abstract: A semiconductor trimming circuit includes parallel coupled PMOS devices coupled in parallel with parallel coupled NMOS devices and an additional pair of dummy NMOS devices. The dummy NMOS devices are coupled in parallel with the NMOS devices. A trimming circuit for an internal clock source may be formed with an array of such switches for selecting one or more trimming capacitors of the trimming circuit. Such an array has a low leakage current and permits good trimming linearity.

Abstract: An oscillator circuit generates a voltage signal. The magnitude of the voltage signal is measured and compared with predetermined upper and lower voltage signals by an internal test circuit. If the magnitude of the voltage signal is between the predetermined upper and lower voltage signals, then a pass test status signal is generated. If the magnitude of the voltage signal is not between the predetermined upper and lower voltage signals then a fail test status signal is generated.