Abstract: A display substrate and a display device. The display substrate includes a driving circuit layer, a first scanning line and a second scanning line. The driving circuit layer includes pixel units arranged in an array form, each pixel unit includes a plurality of sub-pixels, at least one sub-pixel includes a pixel driving circuit, the pixel driving circuit includes a first transistor and a second transistor, an active pattern of the first transistor includes a first channel region, an active pattern of the second transistor includes a second channel region, the first channel region is located on a side of the first scanning line away from the second scanning line, and the second channel region is located on a side of the second scanning line away from the first scanning line.

Abstract: A display substrate, including: a plurality of partition control signal lines disposed on a base substrate; and a plurality of sub-pixels disposed on the base substrate, at least one of the sub-pixels includes a pixel circuit and a light emitting device. The pixel circuit includes a switch transistor, a first partition control transistor, a drive transistor and a first initialization transistor. The first partition control transistor is electrically connected to the switch transistor, the first initialization transistor, the drive transistor and at least one partition control signal line. The first partition control transistor is configured to: in response to a partition control signal on the partition control signal line, selectively transmit a received first initialization signal to a gate electrode of the drive transistor in an initialization phase, and selectively transmit a received data signal to the gate electrode of the drive transistor in a data writing phase.

Abstract: A display substrate and a display apparatus. The display substrate includes a display area provided with pixel circuits arranged in an array and a non-display area provided with M light emitting driving circuits, M control driving circuits and M reset driving circuits. Odd-numbered light emitting driving circuits are electrically connected with first and second light emitting clock signal lines, and even-numbered light emitting driving circuits are connected with third and fourth light emitting clock signal lines; and/or, odd-numbered control driving circuits are electrically connected with first and second control clock signal lines, and even-numbered control driving circuits are connected with third and fourth control clock signal lines; and/or, odd-numbered reset driving circuits are electrically connected with first and second reset clock signal lines, and even-numbered reset driving circuits are connected with third and fourth reset clock signal lines.

Abstract: A display substrate and a display apparatus. The display substrate includes a display area provided with pixel circuits arranged in an array and a non-display area provided with M light emitting driving circuits, M control driving circuits and M reset driving circuits. Odd-numbered light emitting driving circuits are electrically connected with first and second light emitting clock signal lines, and even-numbered light emitting driving circuits are connected with third and fourth light emitting clock signal lines; and/or, odd-numbered control driving circuits are electrically connected with first and second control clock signal lines, and even-numbered control driving circuits are connected with third and fourth control clock signal lines; and/or, odd-numbered reset driving circuits are electrically connected with first and second reset clock signal lines, and even-numbered reset driving circuits are connected with third and fourth reset clock signal lines.

Abstract: The present disclosure provides a signal selection circuit and a signal selection method of a display panel, and a display device. The display panel has N regions and includes pixel driving circuits and M gate driving circuits for providing M gate driving signals to the pixel driving circuits; each gate driving circuit includes N gate driving sub-circuits, each of which is configured to provide one gate driving signal to the pixel driving circuits in one region; M?2, N?2, and M and N are integers; the signal selection circuit includes: M frame start signal lines, each of which is configured to provide a frame start signal for one gate driving circuit; and a selection sub-circuit configured to output frame start signals written by the frame start signal lines to the gate driving sub-circuits corresponding to the regions of the display panel according to a preset sequence.

Abstract: A display substrate, including: a plurality of partition control signal lines disposed on a base substrate; and a plurality of sub-pixels disposed on the base substrate, at least one of the sub-pixels includes a pixel circuit and a light emitting device. The pixel circuit includes a switch transistor, a first partition control transistor, a drive transistor and a first initialization transistor. The first partition control transistor is electrically connected to the switch transistor, the first initialization transistor, the drive transistor and at least one partition control signal line. The first partition control transistor is configured to: in response to a partition control signal on the partition control signal line, selectively transmit a received first initialization signal to a gate electrode of the drive transistor in an initialization phase, and selectively transmit a received data signal to the gate electrode of the drive transistor in a data writing phase.