Abstract: Embodiments of the present disclosure provide a positioning method and apparatus, a device, and a storage medium, the method is applied to a wearable display device, where the wearable display device includes a display host and a peripheral, the display host and/or the peripheral are used for projecting a structure light image onto an object in a real environment, and the method includes: acquiring an image obtained by the display host shooting the object, and an image obtained by the peripheral shooting the object; and determining, according to image obtained by shooting and the structure light image, a pose of the peripheral relative to the display host.

Abstract: Aspects of the disclosure relate to forming a completed stack of layers. Forming the completed stack of layers may include forming a first stack of layers on a first substrate and forming a second stack of layers on a second substrate. The first stack of layers may be bonded to the second stack of layers. The first or second substrate may be removed. Prior to bonding the first stack of layers and the second stack of layer, one or more holes may be etched in the first stack of layers. After removing the second substrate, one or more holes may be etched in the second stack of layers, wherein each of the one or more holes in the second stack of layers extend into a corresponding hole in the one or more holes in the first stack of layers.

Abstract: An assembly may include a base element comprising a base substrate having a frontside with active circuitry and a backside opposite the frontside, a first bonding layer disposed on the frontside of the base substrate and including a signal pad to convey an electrical signal to the active circuitry. The assembly may further include a first functional element comprising a first semiconductor substrate having a frontside with active circuitry and a backside opposite the frontside, a second bonding layer disposed on the frontside of the first semiconductor substrate, and a back surface of the first functional element having a first contact feature to connect to power or ground, wherein the first bonding layer is hybrid bonded to the second bonding layer.

Abstract: An assembly may include a base element comprising a base substrate having a frontside with active circuitry and a backside opposite the frontside, a first bonding layer disposed on the frontside of the base substrate and including a signal pad to convey an electrical signal to the active circuitry. The assembly may further include a first functional element comprising a first semiconductor substrate having a frontside with active circuitry and a backside opposite the frontside, a second bonding layer disposed on the frontside of the first semiconductor substrate, and a back surface of the first functional element having a first contact feature to connect to power or ground, wherein the first bonding layer is hybrid bonded to the second bonding layer.

Abstract: A method for controlling a deformable mirror surface shape based on a radial primary function processes samples of a neural network training set, obtains elements of the neural network training set, characterizes the complex surface shape of the deformable mirror in each sample by using a radial primary function, takes characterization parameters of the surface shape in the each sample as an input of a neural network, and trains the neural network by taking a voltage of each piezoelectric ceramic corresponding to the complex surface shape as a corresponding output of the neural network. Training times of the neural network are consistent with a number of the samples. Finally, the trained neural network is obtained to verify the training effect of the neural network. According to the characterization parameters of the required surface, the neural network is used to control the deformable mirror to generate the required surface.

Abstract: Aspects of the disclosure relate to forming a completed stack of layers. Forming the completed stack of layers may include forming a first stack of layers on a first substrate and forming a second stack of layers on a second substrate. The first stack of layers may be bonded to the second stack of layers. The first or second substrate may be removed. Prior to bonding the first stack of layers and the second stack of layer, one or more holes may be etched in the first stack of layers. After removing the second substrate, one or more holes may be etched in the second stack of layers, wherein each of the one or more holes in the second stack of layers extend into a corresponding hole in the one or more holes in the first stack of layers.

Abstract: This disclosure relates to systems and methods for reinforced semiconductor structures. In some embodiments, an assembly can include a substrate having a top surface and a bottom surface and one or more layers formed on the top surface of the substrate. The one or more layers and the substrate can comprise a plurality of devices to be singulated into dies and a scribe region separating the devices, at least one layer of the one more layers comprising a first dielectric material. The one or more layers and substrate can also include a trench at least partially overlapping the scribe region and at least partially filled with a second dielectric material, wherein the second dielectric material has a higher dielectric constant than a dielectric constant of the first dielectric material, or otherwise more resistant to chipping or cracking than the first dielectric material.

Abstract: Embodiments of the present disclosure provide a positioning method and apparatus, a device, and a storage medium, the method is applied to a wearable display device, where the wearable display device includes a display host and a peripheral, the display host and/or the peripheral are used for projecting a structure light image onto an object in a real environment, and the method includes: acquiring an image obtained by the display host shooting the object, and an image obtained by the peripheral shooting the object; and determining, according to image obtained by shooting and the structure light image, a pose of the peripheral relative to the display host.

Abstract: Aspects of the disclosure relate to forming stacked NAND with multiple memory sections. Forming the stacked NAND with multiple memory sections may include forming a first memory section on a sacrificial substrate. A logic section may be formed on a substrate. The logic section may be bonded to the first memory section. The sacrificial substrate may be removed from the first memory section and a second memory section having a second sacrificial substrate may be formed and bonded to the first memory section.

Abstract: Aspects of the disclosure relate to forming a completed stack of layers. Forming the completed stack of layers may include forming a first stack of layers on a first substrate and forming a second stack of layers on a second substrate. The first stack of layers may be bonded to the second stack of layers. The first or second substrate may be removed. Prior to bonding the first stack of layers and the second stack of layer, one or more holes may be etched in the first stack of layers. After removing the second substrate, one or more holes may be etched in the second stack of layers, wherein each of the one or more holes in the second stack of layers extend into a corresponding hole in the one or more holes in the first stack of layers.

Abstract: Aspects of the disclosure relate to forming stacked NAND with multiple memory sections. Forming the stacked NAND with multiple memory sections may include forming a first memory section on a sacrificial substrate. A logic section may be formed on a substrate. The logic section may be bonded to the first memory section. The sacrificial substrate may be removed from the first memory section and a second memory section having a second sacrificial substrate may be formed and bonded to the first memory section.

Abstract: A method for controlling a deformable mirror surface shape based on a radial primary function processes samples of a neural network training set, obtains elements of the neural network training set, characterizes the complex surface shape of the deformable mirror in each sample by using a radial primary function, takes characterization parameters of the surface shape in the each sample as an input of a neural network, and trains the neural network by taking a voltage of each piezoelectric ceramic corresponding to the complex surface shape as a corresponding output of the neural network. Training times of the neural network are consistent with a number of the samples. Finally, the trained neural network is obtained to verify the training effect of the neural network. According to the characterization parameters of the required surface, the neural network is used to control the deformable mirror to generate the required surface.

Abstract: Aspects of the disclosure relate to forming a completed stack of layers. Forming the completed stack of layers may include forming a first stack of layers on a first substrate and forming a second stack of layers on a second substrate. The first stack of layers may be bonded to the second stack of layers. The first or second substrate may be removed. Prior to bonding the first stack of layers and the second stack of layer, one or more holes may be etched in the first stack of layers. After removing the second substrate, one or more holes may be etched in the second stack of layers, wherein each of the one or more holes in the second stack of layers extend into a corresponding hole in the one or more holes in the first stack of layers.

Abstract: Disclosed are a combined formulation kit for analyzing the phenotype and function of a CD1c+ dendritic cell subset and the use thereof, wherein the detection objects of the kit include CD1c, CD40, IL-6 and IL-10. The kit can be used to efficiently and quickly identify the phenotype of a CD1c+ dendritic cell subset in peripheral blood and analyze the function thereof, thereby ensuring accuracy and reducing the economic cost produced by detecting a large number of surface antigen molecules, and the detection method is also simple to implement.

Abstract: The present disclosure relates to a pair of keyboard/mouse gloves and a control method thereof, where the pair of keyboard/mouse gloves include a left-handed keyboard/mouse glove and a right-handed keyboard/mouse glove that are matched for use and have a same structure, a glove body, a control chip, a plurality of sensor groups, and a display. The sensor group is disposed inside the glove body and respectively sleeved on each finger, and the sensor groups are connected to the control chip after being connected to each other through a data communication line. The control chip receives a single signal or a signal combo from each sensor group for key position analysis, and transmits a key position analysis result to the display for display.

Abstract: The present disclosure relates to a pair of keyboard/mouse gloves and a control method thereof, where the pair of keyboard/mouse gloves include a left-handed keyboard/mouse glove and a right-handed keyboard/mouse glove that are matched for use and have a same structure, a glove body, a control chip, a plurality of sensor groups, and a display. The sensor group is disposed inside the glove body and respectively sleeved on each finger, and the sensor groups are connected to the control chip after being connected to each other through a data communication line. The control chip receives a single signal or a signal combo from each sensor group for key position analysis, and transmits a key position analysis result to the display for display.

Abstract: A microelectronic circuit structure comprises a stack of bonded layers comprising a bottom layer and at least one upper layer. At least one of the upper layers comprises an oxide layer having a back surface and a front surface closer to the bottom layer than the back surface, and a plurality of FD-SOI transistors built on the from surface. At least a first back gate line and a second back gate line extend separate from each other above the back surface for independently providing a first back gate bias to a first group of transistors and a second back gate bias to a second different group of transistors.

Abstract: Techniques for manufacturing memory devices, such as 3-dimensional NAND (3D-NAND) memory devices, may include splitting gate planes (e.g., the planes that include the word lines) into strips, thereby splitting the memory cells and increasing a density of memory cells for a respective memory device. The techniques described herein are applicable to various types of 3D-NAND or other memory devices.

Abstract: A microelectronic circuit structure comprises a stack of bonded layers comprising a bottom layer and at least one upper layer. At least one of the upper layers comprises an oxide layer having a back surface and a front surface closer to the bottom layer than the back surface, and a plurality of FD-SOI transistors built on the front surface. At least a first back gate line and a second back gate line extend separate from each other above the back surface for independently providing a first back gate bias to a first group of transistors and a second back gate bias to a second different group of transistors.

Abstract: Aspects of the disclosure relate to forming a completed stack of layers. Forming the completed stack of layers may include forming a first stack of layers on a first substrate and forming a second stack of layers on a second substrate. The first stack of layers may be bonded to the second stack of layers. The first or second substrate may be removed. Prior to bonding the first stack of layers and the second stack of layer, one or more holes may be etched in the first stack of layers. After removing the second substrate, one or more holes may be etched in the second stack of layers, wherein each of the one or more holes in the second stack of layers extend into a corresponding hole in the one or more holes in the first stack of layers.