Abstract: A display substrate and a display device relate to the technical field of displaying. The display substrate includes a plurality of display units spaced apart from each other and a plurality of connection units, the plurality of connection units being connected between two adjacent display units; the plurality of connection units include: two connection units arranged along a first direction, wherein the first direction is parallel to a stretching direction of the display substrate; wherein the two connection units arranged along the first direction are axisymmetric with respect to a first reference line, so that the plurality of connection units arranged along a second direction have a same deformation amount in a stretching state, the second direction is perpendicular to the stretching direction, and an extension direction of the first reference line is parallel to the second direction.

Abstract: A dual-medium TFB gasification incinerator and implementation method of a waste gasification incineration. The incinerator includes an incinerator body, a gas-solid separator, a waste heat recovery device, and an incinerator body support. The incinerator body includes a gasification section, a combustion section, and a heat exchange section that are all sequentially connected from bottom to top. The combustion section and the heat exchange section are indirectly connected. The incinerator body support includes at least one layer of transverse beam, which is located at a level higher than a connection part of the combustion section and faces the incinerator body. Each of the at least one layer of transverse beam is provided with a layer of support plate on a side close to the incinerator body. Each layer of support plate supports a first-stage of heat exchange furnace wall and heat conduction oil coil pipes provided on an inner surface of the first-stage.

Abstract: A method of forming a semiconductor device includes: forming a first conductive feature in a first dielectric layer disposed over a substrate; forming a second dielectric layer over the first dielectric layer; etching the second dielectric layer using a patterned mask layer to form an opening in the second dielectric layer, where the opening exposes the first conductive feature; performing an ashing process to remove the patterned mask layer after the etching; wet cleaning the opening after the ashing process, where the wet cleaning enlarges a bottom portion of the opening; and filling the opening with a first electrically conductive material.

Abstract: Techniques are described to enable a user equipment (UE) to save power consumption and/or can enable the UE to acquire the channel state in time without reducing the UE's data transmission efficiency. An example technique includes determining, by the communication device, an operating mode based on a first signaling, and operating the communication device in the operating mode, where the operating mode includes any one of a normal mode, a first power saving mode, a second power saving mode, a third power saving mode, or a fourth power saving mode.

Abstract: A photoelectric computing unit, a photoelectric computing array and a photoelectric computing method. The photoelectric computing unit includes a semiconductor multifunctional region structure, which includes at least one carrier control region, at least one coupling region, and at least one photon-generated carrier collection region and readout region.

Abstract: A data processor is for accessing a memory having a first pseudo channel and a second pseudo channel. The data processor includes at least one memory accessing agent, a memory controller, and a data fabric. The at least one memory accessing agent generates generating memory access requests including first memory access requests that access the memory. The memory controller provides memory commands to the memory in response to the first memory access requests. The data fabric routes the first memory access requests to a first downstream port in response to a corresponding first memory request accessing the first pseudo channel, and to a second downstream port in response to the corresponding first memory request accessing the second pseudo channel. The memory controller has first and second upstream ports coupled to the first and second downstream ports of the data fabric, respectively, and a downstream port coupled to the memory.

Abstract: Semiconductor devices and methods of manufacturing the semiconductor devices are described herein. A method includes forming a first opening through a dielectric layer, the first opening exposing a conductive region. A wet cleaning is used after the forming the first opening, and the first opening is treated after the wet cleaning the first opening, the treating the first opening comprising turning a sidewall treatment precursor and a bottom treatment precursor into a first plasma mixture, the sidewall treatment precursor being different from the bottom treatment precursor. The first opening is filled with a conductive material after the treating the first opening.

Abstract: Semiconductor devices and methods of manufacturing the semiconductor devices are described herein. A method includes forming a first opening through a dielectric layer, the first opening exposing a conductive region. A wet cleaning is used after the forming the first opening, and the first opening is treated after the wet cleaning the first opening, the treating the first opening comprising turning a sidewall treatment precursor and a bottom treatment precursor into a first plasma mixture, the sidewall treatment precursor being different from the bottom treatment precursor. The first opening is filled with a conductive material after the treating the first opening.

Abstract: A semiconductor device includes a semiconductor substrate, a gate structure, a silicon oxycarbonitride spacer, a silicon oxycarbide spacer, a silicon nitride spacer, and a source/drain structure. The gate structure is on the semiconductor substrate. The silicon oxycarbonitride spacer is on a sidewall of the gate structure. The silicon oxycarbide spacer is on a sidewall of the silicon oxycarbonitride spacer. The silicon nitride spacer is on a sidewall of the silicon oxycarbide spacer, in which an upper portion of the silicon nitride spacer has a lower density than a lower portion of the silicon nitride spacer. The source/drain structure is on the semiconductor substrate and adjacent to the gate structure.

Abstract: An edge assembly used for a plasma etching system is provided. The edge assembly includes: a focus ring peripherally surrounding an edge portion of a mounting platform mounted in the plasma etching system. The focus ring includes: a lower step portion proximate to the edge portion, the lower step portion extending vertically from a bottom surface of the focus ring to a lower step top surface; and an upper step portion distal to the edge portion, the upper step portion extending vertically from the bottom surface of the focus ring to an upper step top surface and extending radially from an upper step inner side to an upper step outer side. The focus ring is characterized by an air gap located in the upper step portion, and the air gap extends peripherally along a circumstance of the focus ring.

Abstract: Semiconductor devices and methods of manufacturing the semiconductor devices are described herein. A method includes forming a gate electrode, a gate electrode contact layer over the gate electrode, forming a dielectric layer over the gate electrode contact layer, and performing an etch through the dielectric layer, the etch forming an opening that exposes the gate electrode contact layer. The method further includes performing a post-etch treatment on the opening formed by the etch process by exposing the opening to a plasma. The method further includes forming gate electrode contacts in the openings after the post-etch treatment by a bottom-up deposition process.

Abstract: The invention relates to a CTC3.0-based locomotive decoupling and coupling plan automatic generation and execution method. According to the method, by upgrading a track occupancy display terminal and a data platform in a CTC3.0 system, automatic generation of a locomotive decoupling or coupling plan is triggered when the route display terminal receives a train plan, so as to complete a locomotive decoupling or coupling task. The method has the advantages of high automation degree and high transportation efficiency.

Abstract: A method of forming a semiconductor device includes: forming a first conductive feature in a first dielectric layer disposed over a substrate; forming a second dielectric layer over the first dielectric layer; etching the second dielectric layer using a patterned mask layer to form an opening in the second dielectric layer, where the opening exposes the first conductive feature; performing an ashing process to remove the patterned mask layer after the etching; wet cleaning the opening after the ashing process, where the wet cleaning enlarges a bottom portion of the opening; and filling the opening with a first electrically conductive material.

Abstract: The present disclosure relates to a subtle cornea deformation identification method and device based on a pixel-level corneal biomechanical parameter, including the following steps: step 1, sampling and analyzing a dynamic video of corneal stress deformation in a historical database, and calculating pixel-level data; and step 2, configuring an ensemble classifier based on a sampling result and detecting a local change in corneal biomechanics, thus identifying a subtle cornea deformation. The present disclosure has high measurement accuracy and is capable of detecting a local subtle biomechanical change.

Abstract: A method includes forming a gate structure on a semiconductor substrate; depositing a carbon-containing seal layer over the gate structure; depositing a nitrogen-containing seal layer over the carbon-containing seal layer; introducing an oxygen-containing precursor on the nitrogen-containing seal layer; heating the substrate to dissociate the oxygen-containing precursor into an oxygen radical to dope into the nitrogen-containing seal layer; after heating the substrate, etching the nitrogen-containing seal layer and the carbon-containing seal layer, such that a remainder of the nitrogen-containing seal layer and the carbon-containing seal layer remains on a sidewall of the gate structure as a gate spacer.

Abstract: The present disclosure provides a method for preparing an artificial tendon, and the artificial tendon prepared therefrom. The present disclosure uses interfacial polyelectrolyte complexation spinning, and collocates with the self-designed collection machine to produce micron and millimeter-scale fibers, and through the weaving method, it is made into a tailor-made artificial substitute, which is applied to artificial tendons with high tensile strength and durability.

Abstract: A method for making a semiconductor device includes patterning at least one dielectric layer disposed over a conductive cap layer to form a via opening penetrating through the at least one dielectric layer to expose the conductive cap layer and to form a top portion of the conductive cap layer into a metal oxide layer; converting the metal oxide layer to a metal oxynitride layer by a soft ashing process using a processing gas containing nitrogen gas; removing the metal oxynitride layer from a remaining portion of the conductive cap layer; and forming a via contact in the via opening to electrically connect the remaining portion of the conductive cap layer.

Abstract: The present disclosure provides a method for preparing an artificial ligament with high tensile durability, anti-fatigue, low creep and stress relaxation rate, the artificial ligament prepared therefrom, and a fiber collection platform by interfacial polyelectrolyte complexation spinning. The present disclosure uses interfacial polyelectrolyte complexation spinning process, and equips with the self-designed fiber collection machine to produce micron and millimeter-scale fibers. Combing through the weaving method, it is made into a tailor-made artificial substitute, which is applied to artificial ligaments with high tensile strength and durability, anti-fatigue, and low creep and stress relaxation rate.

Abstract: Disclosed are a battery cooling structure, a battery and a power consuming device. The battery cooling structure comprises: a cooling liquid delivery pipe configured to deliver a cooling liquid to a battery enclosure; a cooling channel comprising a first cooling channel and a second cooling channel, the first cooling channel being provided in an enclosure bottom plate of the battery enclosure, the second cooling channel being provided in an enclosure end plate of the battery enclosure, and the first cooling channel and the second cooling channel being in communication with each other once the enclosure bottom plate and the enclosure end plate are combined; and a first water-cooling joint provided on an outer side of the enclosure end plate and comprising a first end and a second end, the first end being connected to the cooling liquid delivery pipe, and the second end being connected to the second cooling channel.

Abstract: A wastewater treatment device has: an ozone generator which supplies ozone; a mixer which mixes ozone supplied from the ozone generator with wastewater and supplies ozone mixed wastewater; an ozone oxidation unit which progresses ozone oxidation in the ozone mixed wastewater while passing the ozone mixed wastewater therethrough and discharges wastewater in which the ozone has been consumed; a biological treatment unit which performs biological treatment on the wastewater discharged from the ozone oxidation unit using microorganisms; and an adjusting device which adjusts the amount of ozone to be mixed with the wastewater by the mixer so that ozone in an amount that inhibits the microorganisms of the biological treatment unit does not remain in the wastewater discharged from the ozone oxidation unit.