Patents by Inventor Xuanlin XIONG

Xuanlin XIONG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11621349
    Abstract: A nano-wall integrated circuit structure with high integration density is disclosed, which relates to the fields of microelectronic technology and integrated circuits (IC). Based on the different device physical principles with MOSFETs in traditional ICs, the nano-wall integrated circuit unit structure (Nano-Wall FET, referred to as NWaFET) with high integration density can improve the integration of the IC, significantly shorten the channel length, improve the flexibility of the device channel width-to-length ratio adjustment, and save chip area.
    Type: Grant
    Filed: July 5, 2021
    Date of Patent: April 4, 2023
    Assignee: University of Electronic Science and Technology of China
    Inventors: Ping Li, Yongbo Liao, Xianghe Zeng, Yaosen Li, Ke Feng, Chenxi Peng, Zhaoxi Hu, Fan Lin, Xuanlin Xiong, Tao He
  • Publication number: 20220149198
    Abstract: A nano-wall integrated circuit structure with high integration density is disclosed, which relates to the fields of microelectronic technology and integrated circuits (IC). Based on the different device physical principles with MOSFETs in traditional ICs, the nano-wall integrated circuit unit structure (Nano-Wall FET, referred to as NWaFET) with high integration density can improve the integration of the IC, significantly shorten the channel length, improve the flexibility of the device channel width-to-length ratio adjustment, and save chip area.
    Type: Application
    Filed: July 5, 2021
    Publication date: May 12, 2022
    Inventors: Ping LI, Yongbo LIAO, Xianghe ZENG, Yaosen LI, Ke FENG, Chenxi PENG, Zhaoxi HU, Fan LIN, Xuanlin XIONG, Tao HE