Abstract: The present invention relates to a method and an universal module for testing functions of communication ports of a computer, including both parallel port and serial port. The module includes a logic control unit and connects to a communication port (a serial or a parallel port) for testing the open or short conditions of the ports through walk 1? and a walk 0? logic tests. The testing module not only can check the open condition of a parallel port, but also can check the open and short conditions of a parallel port and a serial port.

Abstract: A method of detecting short-circuits of a keyboard is provided. The method includes the steps of establishing a database of standard scanned codes and a keyboard matrix that corresponds to keys of a keyboard in the memory device of a computer mainframe and then predefining a set of 25 keys of the keyboard for detection purpose. When a tester presses one of the predefined keys, in the keyboard matrix a row of data line and a column of data line will connect with each other, allowing a keyboard controller to receive a signal variation responsive to the pressed key and then to produce a scanned code responding to the pressed key. After that, the scanned code is transmitted into the buffer of computer mainframe, triggering an interrupt IRQ1 in computer hardware. By executing a comparison program in the memory device of the computer mainframe, the computer mainframe compares the transmitted scanned code in the buffer with the data in the database stored in the memory device.

Abstract: The present invention relates to an apparatus and method for testing the WAIT signal line of a communication interface socket to detect whether the WAIT signal line of the socket, such as a PCMCIA socket, can work properly. The present invention utilizes an electrical switch and several status signal lines, such as IOWR and IN signal lines, to identify the status of the WAIT signal line and detect whether the WAIT signal line works properly according to the status signal lines being in a HIGH state or a LOW state.

Abstract: A method for testing n data pins of a parallel communication port. It includes the main steps of: (a) selecting an address to access a memory unit; (b) selecting a data pin to be tested and a testing data, wherein the testing data is a binary code consisting of (n—1) of first binary digits at data pins other than the data pin being selected and a second binary digit at the data pin being selected, the first binary digit being different from the second binary digit; (c) writing the testing data into the memory unit through all the data pins; (d) reading a stored data from the memory unit also through all the data pins; and (e) comparing the testing data with the stored data to diagnose the data pins, then storing the result into computer memory.

Abstract: The present invention provides a method and apparatus for testing the communication performance of the pins of a serial port. It reads the states of several group of pins to check the existence of the port and the correctness of communication address. Moreover, it checks the working condition of the pins with interruption signals in order to prove the function and communication quality of the serial port.