Patents by Inventor Xue Pitner

Xue Pitner has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250087279
    Abstract: The memory device includes a memory block with an array of memory cells that are arranged in a plurality of word lines. The memory device also includes circuitry that programs the memory cells of a selected word line of the plurality of word lines in a plurality of program loops. In at least one of the program loops, the circuitry is configured to, in a pre-charging operation, apply a first pre-charge voltage to a plurality of unselected word lines of the plurality of word lines and apply a second pre-charge voltage to a first neighboring word line that is immediately adjacent to and on one side of the selected word line. The first neighboring word line contains memory cells that have already been programmed to their final data states.
    Type: Application
    Filed: September 7, 2023
    Publication date: March 13, 2025
    Inventors: Jiacen Guo, Xue Pitner, Xiang Yang
  • Publication number: 20240428874
    Abstract: An apparatus includes one or more control circuits that are configured to connect to a plurality of nonvolatile memory cells. The one or more control circuits are configured to detect a first boundary between written and unwritten portions of an open block and, in response to detecting the first boundary, check for a second boundary between written and unwritten portions of the open block in order to determine if the open block was subject to a non-uniform erase operation.
    Type: Application
    Filed: August 7, 2023
    Publication date: December 26, 2024
    Applicant: Western Digital Technologies, Inc.
    Inventors: Huiwen Xu, Deepanshu Dutta, Ken Oowada, Bo Lei, Ravi J. Kumar, Sujjatul Islam, Xue Pitner
  • Patent number: 11972809
    Abstract: A non-volatile semiconductor memory device includes non-volatile storage elements and one or more control circuits in communication with the non-volatile storage elements. The one or more control circuits are configured to determine for a program iteration of a program operation on a word line whether a condition is met and in response to determining that the condition is met, identify one or more memory cells of the word line that are in an erased state that have a threshold voltage higher than an erase threshold voltage and perform the program iteration of the program operation. The program iteration includes applying a first bitline inhibit voltage to bitlines connected to the identified one or more memory cells and a second bitline inhibit voltage to bitlines connected to one or more memory cells that are in the erased state that do not have a threshold voltage higher than the erase threshold voltage.
    Type: Grant
    Filed: February 28, 2022
    Date of Patent: April 30, 2024
    Assignee: SanDisk Technologies, LLC
    Inventors: Sujjatul Islam, Yu-Chung Lien, Ravi Kumar, Xue Pitner
  • Patent number: 11972801
    Abstract: A non-volatile semiconductor memory device, described herein, comprises non-volatile storage elements and one or more control circuits in communication with the non-volatile storage elements. The one or more control circuits are configured to, during a program iteration of a program operation, determine whether a program voltage level of the program iteration exceeds a threshold program voltage level and in response to the determination, identify a set of voltage levels to apply to a source line connected to a set of the non-volatile storage elements. The one or more control circuits are further configured to perform the program iteration of the program operation on the set of non-volatile storage elements, where the program iteration includes applying the set of voltage levels to the source line.
    Type: Grant
    Filed: February 7, 2022
    Date of Patent: April 30, 2024
    Assignee: SanDisk Technologies, LLC
    Inventors: Xue Pitner, Yu-Chung Lien, Sarath Puthenthermadam, Sujjatul Islam
  • Publication number: 20230274785
    Abstract: A non-volatile semiconductor memory device comprises non-volatile storage elements and one or more control circuits in communication with the non-volatile storage elements. The one or more control circuits are configured to determine for a program iteration of a program operation on a word line whether a condition is met and in response to determining that the condition is met, identify one or more memory cells of the word line that are in an erased state that have a threshold voltage higher than an erase threshold voltage and perform the program iteration of the program operation. The program iteration includes applying a first bitline inhibit voltage to bitlines connected to the identified one or more memory cells and a second bitline inhibit voltage to bitlines connected to one or more memory cells that are in the erased state that do not have a threshold voltage higher than the erase threshold voltage.
    Type: Application
    Filed: February 28, 2022
    Publication date: August 31, 2023
    Applicant: SanDisk Technologies LLC
    Inventors: Sujjatul Islam, Yu-Chung Lien, Ravi Kumar, Xue Pitner
  • Publication number: 20230253047
    Abstract: A non-volatile semiconductor memory device, described herein, comprises non-volatile storage elements and one or more control circuits in communication with the non-volatile storage elements. The one or more control circuits are configured to, during a program iteration of a program operation, determine whether a program voltage level of the program iteration exceeds a threshold program voltage level and in response to the determination, identify a set of voltage levels to apply to a source line connected to a set of the non-volatile storage elements. The one or more control circuits are further configured to perform the program iteration of the program operation on the set of non-volatile storage elements, where the program iteration includes applying the set of voltage levels to the source line.
    Type: Application
    Filed: February 7, 2022
    Publication date: August 10, 2023
    Applicant: SanDisk Technologies LLC
    Inventors: Xue Pitner, Yu-Chung Lien, Sarath Puthenthermadam, Sujjatul Islam
  • Publication number: 20220359024
    Abstract: The non-volatile memory includes a control circuitry that is communicatively coupled to an array of memory cells that are arranged word lines. The control circuitry is configured to program the memory cells using a multi-pass programming operation which includes a first pass and a second pass. The first pass programs the memory cells to a first number of data states, and the second pass programs the memory cells to a greater second number of data states. For at least one word line, during the second pass, a voltage that is applied to at least one memory cell is reduced from a verify voltage by an offset which is determined as a function of a data state of an adjacent memory cell of an adjacent word line and wherein the first pass but not the second pass has been completed in the adjacent word line.
    Type: Application
    Filed: May 4, 2021
    Publication date: November 10, 2022
    Applicant: SanDisk Technologies LLC
    Inventors: Xue Pitner, Muhammad Masuduzzaman, Ravi Kumar
  • Patent number: 11475959
    Abstract: Apparatuses and techniques are described for reducing the program time for a set of memory cells by using an enhanced step up of a program bias. A program operation includes a first pass in which memory cells are programmed to intermediate states and a second program pass in which the memory cells are programmed from an erased state and the intermediate states to final states. In the first program pass, program time can be reduced by applying an enhanced program bias step up to memory cells of the highest intermediate state in a single program loop, for example. The enhanced program bias step up can be achieved by applying a negative bit line voltage and can be triggered when the memory cells assigned to the second highest intermediate state reach a program milestone such as completing programming.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: October 18, 2022
    Assignee: SanDisk Technologies LLC
    Inventors: Yu-Chung Lien, Sujjatul Islam, Xue Pitner
  • Patent number: 11475967
    Abstract: The non-volatile memory includes a control circuitry that is communicatively coupled to an array of memory cells that are arranged word lines. The control circuitry is configured to program the memory cells using a multi-pass programming operation which includes a first pass and a second pass. The first pass programs the memory cells to a first number of data states, and the second pass programs the memory cells to a greater second number of data states. For at least one word line, during the second pass, a voltage that is applied to at least one memory cell is reduced from a verify voltage by an offset which is determined as a function of a data state of an adjacent memory cell of an adjacent word line and wherein the first pass but not the second pass has been completed in the adjacent word line.
    Type: Grant
    Filed: May 4, 2021
    Date of Patent: October 18, 2022
    Assignee: SanDisk Technologies LLC
    Inventors: Xue Pitner, Muhammad Masuduzzaman, Ravi Kumar
  • Patent number: 11302409
    Abstract: A storage device is disclosed herein. The storage device comprises a block including a plurality of memory cells and a circuit coupled to the plurality of memory cells of the block. The circuit is configured to program memory cells of a plurality of strings of a word line of the block and verify, for a plurality of sets of the memory cells, a data state of a set of the memory cells, where each set of the plurality of sets of the memory cells includes a memory cell from each string of the plurality of strings of the word line. Further, the circuit is configured to determine a number of sets of the plurality of memory cell sets that are verified to be in a first data state and determine, based on the number of sets, whether the block is faulty.
    Type: Grant
    Filed: April 21, 2020
    Date of Patent: April 12, 2022
    Assignee: SanDisk Technologies LLC
    Inventors: Xue Pitner, Deepanshu Dutta, Huai-Yuan Tseng, Ravi Kumar, Cynthia Hsu
  • Patent number: 11177002
    Abstract: A storage device including control circuitry, communicatively coupled to a non-volatile memory, configured to receive a parity bit that has been stored using a data structure, and to receive a first subset of host data that includes block data relating to a set of memory cells. The control circuitry may be configured to perform a read operation to identify a second subset of host data that includes additional block data relating to the set of memory cells. The control circuitry may be configured to decode the second subset of host data using the parity bit. The control circuitry may be configured to perform a write operation to write the block data to at least one or more memory cells that are part of the set of memory cells.
    Type: Grant
    Filed: June 30, 2020
    Date of Patent: November 16, 2021
    Assignee: SanDisk Technologies LLC
    Inventors: Xue Pitner, Ravi Kumar, Deepanshu Dutta
  • Publication number: 20210327520
    Abstract: A storage device is disclosed herein. The storage device comprises a block including a plurality of memory cells and a circuit coupled to the plurality of memory cells of the block. The circuit is configured to program memory cells of a plurality of strings of a word line of the block and verify, for a plurality of sets of the memory cells, a data state of a set of the memory cells, where each set of the plurality of sets of the memory cells includes a memory cell from each string of the plurality of strings of the word line. Further, the circuit is configured to determine a number of sets of the plurality of memory cell sets that are verified to be in a first data state and determine, based on the number of sets, whether the block is faulty.
    Type: Application
    Filed: April 21, 2020
    Publication date: October 21, 2021
    Applicant: SanDisk Technologies LLC
    Inventors: Xue Pitner, Deepanshu Dutta, Huai-Yuan Tseng, Ravi Kumar, Cynthia Hsu