Abstract: A field of memory technologies and a reading circuit for a differential one time programmable (OTP) memory including a first and second memory cells in a differentially symmetrical structure, the reading circuit connects between the first and second memory cells and includes: a detector having a first and second connected to respective first and second memory cells, configured to detect one of a resistance value of a first or second fuse of respective first and second memory cells, and a resistance difference between the first and second fuse after a burn-in operation of the first or second memory is completed; and a latch connected to the detector, provides a readout data according to one of the resistance value of the first or second fuse, and the resistance difference. The reading circuit may both read out data normally and detect a resistance value of the fuse.

Abstract: A field of memory technologies and a reading circuit for a differential one time programmable (OTP) memory including a first and second memory cells in a differentially symmetrical structure, the reading circuit connects between the first and second memory cells and includes: a detector having a first and second connected to respective first and second memory cells, configured to detect one of a resistance value of a first or second fuse of respective first and second memory cells, and a resistance difference between the first and second fuse after a burn-in operation of the first or second memory is completed; and a latch connected to the detector, provides a readout data according to one of the resistance value of the first or second fuse, and the resistance difference. The reading circuit may both read out data normally and detect a resistance value of the fuse.