Patents by Inventor Xuehuan Feng

Xuehuan Feng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12039949
    Abstract: A shift register unit, a gate driving circuit, a display device, and a driving method are disclosed. The shift register unit includes a blanking input circuit, a blanking control circuit, a blanking coupling circuit, a display input circuit and an output circuit. The blanking input circuit is configured to charge a control node in response to a compensation selection control signal, and to maintain a level of the control node. The blanking control circuit is configured to charge a first node, by using a first clock signal, under control of the level of the control node and the first clock signal. The blanking coupling circuit is electrically connected to the control node, and is configured to control, by coupling, the level of the control node in response to the first clock signal.
    Type: Grant
    Filed: July 16, 2019
    Date of Patent: July 16, 2024
    Assignees: Hefei Xinsheng Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Xuehuan Feng, Yongqian Li
  • Patent number: 12027099
    Abstract: A shift-register unit includes a first circuit including a first input circuit coupled via a first node to a first output circuit, and a second circuit including a second input circuit coupled via a second node to a second output circuit. The first input circuit is configured to control a voltage level of the first node in response to a first input signal. The first output circuit is configured to output a shift-register signal and a first output signal in response to the voltage level of the first node. The second input circuit is configured to control a voltage level of the second node in response to the first input signal. The second output circuit is configured to output a second output signal in response to the voltage level of the second node. The first input circuit and the second input circuit have a same circuit structure.
    Type: Grant
    Filed: May 30, 2023
    Date of Patent: July 2, 2024
    Assignees: Hefei BOE Joint Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Xuehuan Feng, Yongqian Li, Xing Zhang
  • Publication number: 20240212623
    Abstract: A scan driving circuit includes shift registers and clock signal lines. A shift register includes: an output circuit electrically connected to a scan input signal terminal and a pull-up node; a black frame insertion circuit electrically connected to a first clock signal terminal, a black frame insertion input signal terminal, a first voltage signal terminal, a second clock signal terminal and the pull-up node; and an output circuit electrically connected to the pull-up node, a third clock signal terminal, a shift signal terminal, a fourth clock signal terminal and a first output signal terminal. The shift registers include first shift registers and second shift registers. Third and fourth clock signal terminals of a first shift register are electrically connected to a same clock signal line. Third and fourth clock signal terminals of a second shift register are electrically connected to different clock signal lines.
    Type: Application
    Filed: November 9, 2021
    Publication date: June 27, 2024
    Applicants: Hefei BOE Joint Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xuehuan FENG, Yongqian LI
  • Publication number: 20240203357
    Abstract: A display panel has a display area and a fan-out region. The display panel includes: a substrate; a scan driving circuit including shift registers and clock signal lines, sub-pixels and signal transmission lines that are located in the display area; and a power supply voltage bus and connection lines that are located in the fan-out region. The sub-pixels are arranged in rows and columns, sub-pixels in a column are arranged along a second direction. A signal transmission line is electrically connected to column(s) of sub-pixels. The connection lines include first connection sub-lines, second connection sub-lines and third connection sub-lines that extend along the second direction and are located away from the sub-pixels. A first connection sub-line, a second connection sub-line and a third connection sub-line are electrically connected to the signal transmission line, the power supply voltage bus, and a clock signal line, respectively.
    Type: Application
    Filed: April 1, 2021
    Publication date: June 20, 2024
    Inventors: Xuehuan FENG, Yongqian LI, Pan XU
  • Patent number: 12014668
    Abstract: A shift register unit, a gate driving circuit, a display device, and a driving method are disclosed. The shift register unit includes a blanking unit, a first transmission circuit and a first input-output unit. The blanking unit is configured to charge a pull-up control node in response to a compensation selection control signal and input a blanking pull-up signal to a blanking pull-up node. The first transmission circuit is electrically connected to the blanking pull-up node and the first pull-up node; and the first input-output unit includes a first leakage preventing structure, the first leakage preventing structure is electrically connected to the first pull-up node and a first leakage preventing node respectively, and the leakage preventing structure is configured to control a level of the first leakage preventing node under the control of the level of the first pull-up node to prevent the first pull-up node from leaking.
    Type: Grant
    Filed: February 23, 2023
    Date of Patent: June 18, 2024
    Assignees: Hefei Xinsheng Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Xuehuan Feng, Yongqian Li
  • Patent number: 12014689
    Abstract: A shift register unit, a driving method thereof, and a gate driving circuit are disclosed. The shift register unit includes: an input circuit configured to receive an input signal from an input signal terminal and output the input signal to a voltage stabilizer node; a voltage-stabilizing circuit configured to input potential of the voltage stabilizer node to a pull-up node and control potential of the voltage stabilizer node; an output circuit configured to receive a clock signal from a clock signal terminal and provide an output signal to an output signal terminal based on the clock signal received under control of the potential of the pull-up node; and a control circuit configured to control potential of the output signal terminal under control of the potential of the pull-up node.
    Type: Grant
    Filed: May 30, 2023
    Date of Patent: June 18, 2024
    Assignees: HEFEI BOE JOINT TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xuehuan Feng, Sixiang Wu
  • Publication number: 20240194149
    Abstract: A shift register unit, a gate driving circuit, a display device, and a driving method are disclosed. The shift register unit includes a first transmission circuit and a first input-output unit. The first transmission circuit is electrically connected to a blanking pull-up node and a first pull-up node. The first input-output unit includes an output circuit, a first pull-down control circuit, and a first pull-down auxiliary control circuit.
    Type: Application
    Filed: February 19, 2024
    Publication date: June 13, 2024
    Applicants: Hefei Xinsheng Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Xuehuan Feng, Yongqian Li
  • Patent number: 12008974
    Abstract: A shift register circuit includes an input sub-circuit, an output sub-circuit and a control sub-circuit. The input sub-circuit is coupled to a first input signal terminal and a pull-up node, and configured to, under control of a first input signal, transmit the first input signal to the pull-up node. The output sub-circuit is at least coupled to the pull-up node, a first clock signal terminal and a first signal output terminal, and configured to transmit a first clock signal to the first signal output terminal under control of a voltage at the pull-up node. The control sub-circuit is coupled to at least one first reference node, at least one first control signal terminal and the pull-up node, and configured to transmit a voltage at a first reference node to the pull-up node under control of a first control signal.
    Type: Grant
    Filed: November 24, 2020
    Date of Patent: June 11, 2024
    Assignees: HEFEI BOE JOINT TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xuehuan Feng, Yongqian Li
  • Publication number: 20240188349
    Abstract: A display substrate and a display device. The display substrate includes a base substrate, and a plurality of pixel units and a plurality of scanning lines on the base substrate. Each pixel unit includes a plurality of sub-pixels and a light shielding layer, the plurality of sub-pixels is arranged in sequence in a first direction, each sub-pixel includes a sub-pixel driving circuitry and a light-emitting element coupled to each other, and the sub-pixel driving circuitry is configured to provide a driving signal to the light-emitting element. At least a part of the light shielding layer is arranged between the sub-pixel driving circuitry and the base substrate. Each scanning line includes at least a part extending in the first direction, is coupled to a corresponding sub-pixel driving circuitry, and is arranged at a same layer as the light shielding layer.
    Type: Application
    Filed: August 25, 2021
    Publication date: June 6, 2024
    Applicants: HEFEI BOE JOINT TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yongqian LI, Can YUAN, Xuehuan FENG
  • Publication number: 20240185793
    Abstract: A shift register is provided to include a voltage control circuit coupled to an output control node; at least one driving output circuit, each including an output transistor and a capacitor structure sequentially arranged along a first direction; a first conductive line therebetween and extending along a second direction and coupled to a signal output line configured for the driving output circuit; the output transistor includes a gate electrode coupled to the output control node and a first voltage writing electrode of the capacitor structure, a first electrode coupled to a clock signal line configured for the driving output circuit and a second electrode coupled to the first conductive line; a second conductive line is disposed between the first conductive line and the capacitor structure, and the first conductive line is coupled to a second voltage writing electrode of the capacitor structure through the second conductive line.
    Type: Application
    Filed: November 18, 2022
    Publication date: June 6, 2024
    Inventors: Xuehuan FENG, Dacheng ZHANG, Yongqian LI, Mingming XIE
  • Publication number: 20240169928
    Abstract: A display panel includes: a substrate, sub-pixels and a gate drive circuit. The sub-pixel includes a pixel drive circuit. The gate drive circuit includes cascaded shift registers, and a shift register is electrically connected to pixel drive circuits in a row of sub-pixels. The gate drive circuit further includes cascade input signal lines and cascade display reset signal lines. The cascade input signal line is configured to connect a shift signal terminal and an input signal terminal of two different shift register; and the cascade display reset signal line is configured to connect a shift signal terminal and a display reset signal terminal of two different shift register. The display panel has sub-pixel regions for arranging the sub-pixels and first gap regions each located between two adjacent columns of sub-pixel regions; the cascade display reset signal lines and the cascade input signal lines are disposed in different first gap regions.
    Type: Application
    Filed: January 24, 2024
    Publication date: May 23, 2024
    Inventors: Ying HAN, Xuehuan FENG, Yicheng LIN, Pan XU, Guoying WANG, Xing ZHANG, Zhan GAO, Mingi CHU
  • Publication number: 20240161665
    Abstract: A method of repairing a gate-on-array circuit is provided. The method includes at least one of disconnecting a X-th stage gate driving signal output terminal from a X-th stage gate driving signal output line; disconnecting a X-th stage compensation control signal output terminal from a X-th stage compensation control signal output line; or disconnecting a X-th stage carry signal output terminal from a X-th stage carry signal output line. The method further includes at least one of connecting the X-th stage gate driving signal output line to a repair gate driving signal output terminal through a gate driving signal output repair line; connecting the X-th stage compensation control signal output line to a repair compensation control signal output terminal through a compensation control signal output repair line; or connecting the X-th stage carry signal output line to a repair carry signal output terminal through a carry signal output repair fine.
    Type: Application
    Filed: August 31, 2021
    Publication date: May 16, 2024
    Applicants: Hefei BOE Joint Technology Co.,Ltd., BOE Technology Group Co., Ltd.
    Inventors: Xuehuan Feng, Xuelian Cheng
  • Patent number: 11984085
    Abstract: A shift register unit, a gate driving circuit, a display device, and a driving method are disclosed. The shift register unit includes a first sub-circuit, a second sub-circuit, a leakage prevention circuit and a blanking input sub-circuit, wherein the first sub-circuit comprises a first input circuit and a first output circuit; the second sub-circuit comprises a second input circuit and a second output circuit; the leakage prevention circuit is configured to control a level of a leakage prevention node under control of the level of the first node, so as to turn off a circuit connected between the first node and the leakage prevention node; and the blanking input sub-circuit is connected to the first node and the second node, and is configured to receive a selection control signal and a first clock signal, and control the level of the first node and the level of the second node.
    Type: Grant
    Filed: February 13, 2023
    Date of Patent: May 14, 2024
    Assignees: HEFEI BOE JOINT TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xuehuan Feng, Yongqian Li, Hao Liu
  • Patent number: 11974464
    Abstract: A driving backplane includes a base substrate, and data lines, a first gate line, a second gate line and pixel driving circuits that are disposed on the base substrate. The first gate line and the second gate line are adjacent. Each pixel driving circuit includes a first transistor including an active layer. The active layer includes an active portion, a first conductive portion and a second conductive portion. Active portions of first transistors further include first contact portions. The pixel driving circuits include a first pixel driving circuit and a second pixel driving circuit that are coupled to a data line and the first gate line. A first conductive portion in the first pixel driving circuit and a first conductive portion in the second pixel driving circuit are in contact through a first contact portion, and are coupled to the data line through the first contact portion.
    Type: Grant
    Filed: February 18, 2021
    Date of Patent: April 30, 2024
    Assignees: Hefei BOE Joint Technology Co., Ltd., BOE TECHNOLOGY GROUP CO. LTD.
    Inventors: Xuehuan Feng, Yongqian Li
  • Patent number: 11963397
    Abstract: A display region includes a plurality of pixel driving circuitry setting regions arranged sequentially in a first direction, and each pixel driving circuitry setting region extends in a second direction intersecting the first direction. Each display circuitry includes a plurality of subpixels in one-to-one correspondence with the pixel driving circuitry setting regions, each subpixel includes a subpixel driving circuitry and a light-emitting element coupled to each other, the subpixel driving circuitry is located in a corresponding pixel driving circuitry setting region, the light-emitting element is located at a side of the subpixel driving circuitry away from the substrate, a width of the light-emitting element is greater than a width of the corresponding pixel driving circuitry setting region in the first direction, and a length of the light-emitting element is smaller than a length of the corresponding pixel driving circuitry setting region in the second direction.
    Type: Grant
    Filed: May 15, 2020
    Date of Patent: April 16, 2024
    Assignees: HEFEI BOE JOINT TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Meng Li, Yongqian Li, Jingquan Wang, Chen Xu, Dacheng Zhang, Zhidong Yuan, Can Yuan, Xuehuan Feng
  • Patent number: 11942041
    Abstract: A shift register unit, a gate driving circuit, a display device, and a driving method are disclosed. The shift register unit includes a blanking unit, a first transmission circuit, and a first input-output unit. The blanking unit is configured to charge a pull-up control node in response to a compensation selection control signal and input a blanking pull-up signal to a blanking pull-up node. The first transmission circuit is electrically connected to the blanking pull-up node and the first pull-up node. The first input-output unit includes an output circuit, a first pull-down control circuit, and a first pull-down auxiliary control circuit.
    Type: Grant
    Filed: June 13, 2022
    Date of Patent: March 26, 2024
    Assignees: Hefei Xinsheng Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Xuehuan Feng, Yongqian Li
  • Patent number: 11935469
    Abstract: A pixel circuit array, a display panel, a method for driving a pixel circuit array, and a method for driving a display panel are provided. The pixel circuit array may include: a first signal sensing line (SENSE1) and a second signal sensing line (SENSE2); and N pixel circuits arranged in a column. All of the N pixel circuits are divided into a first group and a second group, each pixel circuit in the first group is coupled to the first signal sensing line (SENSE1), and each pixel circuit in the second group is coupled to the second signal sensing line (SENSE2) different from the first signal sensing line (SENSE1), where N is a positive integer greater than 1.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: March 19, 2024
    Assignees: Hefei BOE Joint Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xuehuan Feng, Yongqian Li, Pan Xu, Zhongyuan Wu
  • Patent number: 11935484
    Abstract: A display panel includes a plurality of rows of sub-pixels and at least one gate driver circuit that are disposed on a base substrate. Each sub-pixel includes a pixel driver circuit and a light-emitting device coupled to the pixel driver circuit, and a gate driver circuit includes a plurality of shift registers that are cascaded and a plurality of control signal lines. A shift register is coupled to a plurality of pixel driver circuits in at least one row of sub-pixels and at least a part of the plurality of control signal lines, and includes a plurality of first thin film transistors that are divided into a plurality of first thin film transistors. At least one thin film transistor group is located in the display region and distributed between adjacent sub-pixels in a same row of sub-pixels.
    Type: Grant
    Filed: October 23, 2020
    Date of Patent: March 19, 2024
    Assignees: Hefei BOE Joint Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xuehuan Feng, Yongqian Li
  • Patent number: 11929009
    Abstract: A shift register comprises a first shift register unit and a second shift register unit. The first shift register unit comprises a first input circuit connected to a first input terminal and a first pull-up node, a first output circuit connected to the first pull-up node, a first output terminal and a first clock terminal, and a first pull-down circuit. The second shift register unit comprises a second input circuit connected to a second input terminal and a second pull-up node, and a second output circuit connected to the second pull-up node, a second output terminal and a second clock signal.
    Type: Grant
    Filed: March 9, 2023
    Date of Patent: March 12, 2024
    Assignees: Hefei BOE Joint Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Xuehuan Feng, Yongqian Li
  • Publication number: 20240071541
    Abstract: A shift register includes a first scan unit, a leakage prevention unit, and a leakage prevention input unit. The first scan unit includes a first input circuit configured to transmit an input signal to a first pull-up node. The leakage prevention input unit is configured to: transmit a first voltage signal to a leakage prevention input node; and transmit a second voltage signal to the leakage prevention input node. The first voltage signal and the second voltage signal are different. The leakage prevention unit is configured to transmit one of the first voltage signal and the second voltage signal from the leakage prevention input node to a first leakage prevention node.
    Type: Application
    Filed: November 7, 2023
    Publication date: February 29, 2024
    Inventors: Xuehuan FENG, Yongqian LI