Patents by Inventor Xuejin Wang

Xuejin Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150058761
    Abstract: The present invention relates to the field of human-machine interactions and discloses an information processing method and an electronic device so as to address the technical problems in the convention that it may be time-consuming for the electronic device to receive an entry operation and the electronic device may respond to an improper entry operation. The method is applicable to an electronic device with a display unit on which there are displayed N target objects, wherein N is a positive integer, there is a display parameter for each of the target objects, there is an initial value for the display parameter of each of the target objects, and the display parameter is configured to determine a display size of the target object, and wherein the method includes: determining M target objects and K target objects among the N target objects according to a preset rule.
    Type: Application
    Filed: March 30, 2014
    Publication date: February 26, 2015
    Applicants: Lenovo (Beijing) Co., Ltd., Beijing Lenovo Software Ltd.
    Inventors: Hainan Cai, Zhiming Meng, Zhiyi Cai, Xuejin Wang, Yonggui Wu, Yidong Liu
  • Patent number: 8624658
    Abstract: A frequency mixer having parallel mixer cores is described that is configured to heterodyne a signal. In an implementation, the frequency mixer includes a first mixer core and a second mixer core. A first balun is connected to the first mixer core and configured to furnish a LO signal occurring in a first range of frequencies to the first mixer core. The mixer includes a second balun coupled to the second mixer core, and the second balun is configured to furnish a LO signal occurring in a second range of frequencies during a second time interval. The mixer includes a first biasing voltage source that is center tapped to the first balun and a second biasing voltage source is center tapped to the second balun to further prevent operation of the at least substantially non-operational mixer core.
    Type: Grant
    Filed: July 30, 2012
    Date of Patent: January 7, 2014
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Theron L. Jones, Richard D. Davis, James Imbornone, Xuejin Wang
  • Patent number: 8380468
    Abstract: A system, method, and software program for facilitating the assignment of cell specifications to a plurality of cells of a system design. The methods include generating a plurality of candidate cell specifications that meet the specification for the system design. In one embodiment, the method entails using information related to intra-range preference for cell specifications to generate a set of alternative system pareto-optimal solutions which define a boundary of a region of candidate cell specifications. In another embodiment, the method entails generating a substantially uniform set of candidate cell specifications using a prediction-based performance model, such as support vector regression model or cluster-weighted model, an optimizing algorithm such as conjugate-gradient or Markov Chain Monte Carlo Method, and a sample density model.
    Type: Grant
    Filed: April 12, 2011
    Date of Patent: February 19, 2013
    Assignee: Cadence Design Systems, Inc.
    Inventors: Stephen McCracken, Enis Aykut Dengi, Xuejin Wang
  • Patent number: 7933748
    Abstract: A system, method, and software program for facilitating the assignment of cell specifications to a plurality of cells of a system design. The methods include generating a plurality of candidate cell specifications that meet the specification for the system design. In one embodiment, the method entails using information related to intra-range preference for cell specifications to generate a set of alternative system pareto-optimal solutions which define a boundary of a region of candidate cell specifications. In another embodiment, the method entails generating a substantially uniform set of candidate cell specifications using a prediction-based performance model, such as support vector regression model or cluster-weighted model, an optimizing algorithm such as conjugate-gradient or Markov Chain Monte Carlo Method, and a sample density model.
    Type: Grant
    Filed: December 18, 2007
    Date of Patent: April 26, 2011
    Assignee: Cadence Design Systems, Inc.
    Inventors: Stephen McCracken, Enis Aykut Dengi, Xuejin Wang
  • Patent number: 7603642
    Abstract: The invention is a method of placement of components and networks (nets), utilized for interconnecting the components, of a circuit layout. The method includes forming for electrical devices, pads (or lands) and networks (nets) of a circuit layout a listing of the positions thereof with respect to one another, connections therebetween and the orientation of each net or subnet thereof in the circuit layout. The thus formed list is processed subject to at least one objective regarding the size of the circuit layout, whereupon a placement of the electrical devices and the pads is determined simultaneously with the placement of the networks.
    Type: Grant
    Filed: September 27, 2006
    Date of Patent: October 13, 2009
    Assignee: Cadence Design Systems, Inc.
    Inventors: Pero Subasic, Xuejin Wang, Enis A. Dengi, Ibraz H. Mohammed
  • Publication number: 20080077898
    Abstract: The invention is a method of placement of components and networks (nets), utilized for interconnecting the components, of a circuit layout. The method includes forming for electrical devices, pads (or lands) and networks (nets) of a circuit layout a listing of the positions thereof with respect to one another, connections therebetween and the orientation of each net or subnet thereof in the circuit layout. The thus formed list is processed subject to at least one objective regarding the size of the circuit layout, whereupon a placement of the electrical devices and the pads is determined simultaneously with the placement of the networks.
    Type: Application
    Filed: September 27, 2006
    Publication date: March 27, 2008
    Applicant: Cadence Design Systems, Inc.
    Inventors: Pero Subasic, Xuejin Wang, Enis Aykut Dengi, Ibraz H. Mohammed