Patents by Inventor Xuejing Che

Xuejing Che has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Test system and method of testing a wafer for integrated circuit devices
    Patent number: 10823759
    Abstract: A test system for testing a wafer for integrated circuit devices is described. The test system comprises a first plurality of test probes adapted to make electrical contacts to first corresponding contacts of a wafer tested by the test system; a second plurality of test probes adapted to make electrical contacts to second corresponding contacts on a perimeter region of a portion of the wafer tested by the test system; and a control circuit coupled to the first plurality of test probes and the second plurality of test probes; wherein the control circuit determines whether the second plurality of test probes has a proper contact with the wafer based upon signals received by the second plurality of test probes. A method of testing a wafer for an integrated circuit is also described.
    Type: Grant
    Filed: November 5, 2018
    Date of Patent: November 3, 2020
    Assignee: XILINX, INC.
    Inventors: Lik Huay Lim, Andy Widjaja, King Yon Lew, Mohsen H. Mardi, Xuejing Che
  • Method of assigning contact elements associated with an integrated circuit device
    Patent number: 10783308
    Abstract: A graphical tool for a design of a substrate of an integrated circuit device is described. The graphical tool comprises a processor configured to: display locations of probes for a first plurality of contact elements associated with the substrate; display locations of BGA contact elements associated with the substrate; identify interconnect elements between the first plurality of contact elements and the BGA contact elements; and display connections lines representing the identified interconnect elements. A method of designing a substrate of an integrated circuit device is also described.
    Type: Grant
    Filed: December 20, 2018
    Date of Patent: September 22, 2020
    Assignee: XILINIX, INC.
    Inventors: Lik Huay Lim, Andy Widjaja, King Yon Lew, Xuejing Che, Mohsen H. Mardi
  • TEST SYSTEM AND METHOD OF TESTING A WAFER FOR INTEGRATED CIRCUIT DEVICES
    Publication number: 20200141976
    Abstract: A test system for testing a wafer for integrated circuit devices is described. The test system comprises a first plurality of test probes adapted to make electrical contacts to first corresponding contacts of a wafer tested by the test system; a second plurality of test probes adapted to make electrical contacts to second corresponding contacts on a perimeter region of a portion of the wafer tested by the test system; and a control circuit coupled to the first plurality of test probes and the second plurality of test probes; wherein the control circuit determines whether the second plurality of test probes has a proper contact with the wafer based upon signals received by the second plurality of test probes. A method of testing a wafer for an integrated circuit is also described.
    Type: Application
    Filed: November 5, 2018
    Publication date: May 7, 2020
    Applicant: Xilinx, Inc.
    Inventors: Lik Huay Lim, Andy Widjaja, King Yon Lew, Mohsen H. Mardi, Xuejing Che