Abstract: Amorphous silicon carbide thin film structures, including: protective coatings for windows in infrared process stream monitoring systems and sensor domes, heated windows, electromagnetic interference shielding members and integrated micromachined sensors; high-temperature sensors and circuits; and diffusion barrier layers in VLSI circuits. The amorphous silicon carbide thin film structures are readily formed, e.g., by sputtering at low temperatures.

Abstract: A method of making a single crystal GaN boule, comprising contacting a GaN seed wafer with a GaN source environment under process conditions including a thermal gradient in the GaN source environment producing growth of gallium nitride on the GaN seed wafer, thereby forming the GaN boule. The GaN source environment in various implementations includes gallium melt in an ambient atmosphere of nitrogen or ammonia, or alternatively, supercritical ammonia containing solubilized GaN. The method produces single crystal GaN boules >10 millimeters in diameter, of device quality suitable for production of GaN wafers useful in the fabrication of microelectronic, optoelectronic and microelectromechanical devices and device precursor structures therefor.

Abstract: A III-V nitride homoepitaxial microelectronic device structure comprising a III-V nitride homoepitaxial epi layer of improved epitaxial quality deposited on a III-V nitride material substrate, e.g., of freestanding character. Various processing techniques are described, including a method of forming a III-V nitride homoepitaxial layer on a corresponding III-V nitride material substrate, by depositing the III-V nitride homoepitaxial layer by a VPE process using Group III source material and nitrogen source material under process conditions including V/III ratio in a range of from about 1 to about 105, nitrogen source material partial pressure in a range of from about 1 to about 103 torr, growth temperature in a range of from about 500 to about 1250 degrees Celsius, and growth rate in a range of from about 0.1 to about 102 microns per hour.

Abstract: A flat-panel display contains a pair of plate structure (20 and 22) separated by a spacer (24) having a rough face (54 or 56). When electrons strike the spacer, the roughness in the spacer's face causes the number of secondary electrons that escape the spacer to be reduced, thereby alleviating positive charge buildup on the spacer. As a result, the image produced by the display is improved. The spacer facial roughness can be achieved in various ways such as depressions (60, 62, 64, 66, 70, 74, or 80) or/and protuberances (82, 84, 88, and 92). Various techniques are presented for manufacturing the display, including the rough-faced spacer.

Abstract: AlxGayInzN, wherein 0≦x≦1, 0≦y≦1, 0≦z≦1, and x+y+z=1, characterized by a root mean square surface roughness of less than 1 nm in a 10×10 &mgr;m22 area. The AlxGayInzN may be in the form of a wafer, which is chemically mechanically polished (CMP) using a CMP slurry comprising abrasive particles, such as silica or alumina, and an acid or a base. High quality AlxGayInzN wafers can be fabricated by steps including lapping, mechanical polishing, and reducing internal stress of said wafer by thermal annealing or chemical etching for further enhancement of its surface quality. CMP processing may be usefully employed to highlight crystal defects of an AlxGayInzN wafer.

Abstract: A high quality wafer comprising AlxGayInzN, wherein 0<y≦1 and x+y+z=1, characterized by a root mean square surface roughness of less than 1 nm in a 10×10 &mgr;m2 area at its Ga-side. Such wafer is chemically mechanically polished (CMP) at its Ga-side, using a CMP slurry comprising abrasive particles, such as silica or alumina, and an acid or a base. The process of fabricating such high quality AlxGayInzN wafer may include steps of lapping, mechanical polishing, and reducing internal stress of said wafer by thermal annealing or chemical etching for further enhancement of its surface quality. The CMP process is usefully employed to highlight crystal defects on the Ga-side of the AlxGayInzN wafer.

Abstract: A high quality wafer comprising AlxGayInzN, wherein 0<y≦1 and x+y+z=1, characterized by a root mean square surface roughness of less than 1 nm in a 10×10 &mgr;m2 area at its Ga-side. Such wafer is chemically mechanically polished (CMP) at its Ga-side, using a CMP slurry comprising abrasive particles, such as silica or alumina, and an acid or a base. The process of fabricating such high quality AlxGayInzN wafer may include steps of lapping, mechanical polishing, and reducing internal stress of said wafer by thermal annealing or chemical etching for further enhancement of its surface quality. The CMP process is usefully employed to highlight crystal defects on the Ga-side of the AlxGayInzN wafer.

Abstract: A III-V nitride homoepitaxial microelectronic device structure comprising a III-V nitride homoepitaxial epi layer on a III-V nitride material substrate, e.g., of freestanding character. Various processing techniques are described, including a method of forming a III-V nitride homoepitaxial layer on a corresponding III-V nitride material substrate, by depositing the III-V nitride homoepitaxial layer by a VPE process using Group III source material and nitrogen source material under process conditions including V/III ratio in a range of from about 1 to about 105, nitrogen source material partial pressure in a range of from about 1 to about 103 torr, growth temperature in a range of from about 500 to about 1250 degrees Celsius, and growth rate in a range of from about 0.1 to about 500 microns per hour. The III-V nitride homoepitaxial microelectronic device structures are usefully employed in device applications such as UV LEDs, high electron mobility transistors, and the like.

Abstract: A microelectronic or microelectromechanical device, including a substrate and a carbon microfiber formed thereon, which may be employed as an electrical connector for the device or as a selectively translational component of a microelectromechanical (MEMS) device.

Abstract: Amorphous silicon carbide thin film structures, including: protective coatings for windows in infrared process stream monitoring systems and sensor domes, heated windows, electromagnetic interference shielding members and integrated micromachined sensors; high-temperature sensors and circuits; and diffusion barrier layers in VLSI circuits. The amorphous silicon carbide thin film structures are readily formed, e.g., by sputtering at low temperatures.

Abstract: A cathode structure suitable for a flat panel display is provided with coated emitters. The emitters are formed with material, typically nickel, capable of growing to a high aspect ratio. These emitters are then coated with carbon containing material for improving the chemical robustness and reducing the work function. One coating process is a DC plasma deposition process in which acetylene is pumped through a DC plasma reactor to create a DC plasma for coating the cathode structure. An alternative coating process is to electrically deposit raw carbon-based material onto the surface of the emitters, and subsequently reduce the raw carbon-based material to the carbon containing material. Work function of coated emitters is typically reduced by about 0.8 to 1.0 eV.

Abstract: A cathode structure suitable for a flat panel display is provided with coated emitters. The emitters are formed with material, typically nickel, capable of growing to a high aspect ratio. These emitters are then coated with carbon containing material for improving the chemical robustness and reducing the work function. One coating process is a DC plasma deposition process in which acetylene is pumped through a DC plasma reactor to create a DC plasma for coating the cathode structure. An alternative coating process is to electrically deposit raw carbon-based material onto the surface of the emitters, and subsequently reduce the raw carbon-based material to the carbon containing material. Work function of coated emitters is typically reduced by about 0.8 to 1.0 eV.

Abstract: A cathode structure suitable for a flat-panel display contains an emitter layer (213) divided into emitter lines, a plurality of electron emitters (229, 239, or 230) situated over the emitter lines, and a gate layer (215A) having an upper surface spaced largely above the electron emitters. The gate layer has a plurality of gate holes (215B) each corresponding to one of the electron emitters. The cathode structure further includes a carbon-containing layer (340, 240, or 241) coated over the electron emitters and directly on at least part of the upper surface of the gate layer such that at least part of the carbon-containing layer extending along and above the gate layer is exposed.

Abstract: A cathode structure suitable for a flat panel display is provided with coated emitters. The emitters are formed with material, typically nickel, capable of growing to a high aspect ratio. These emitters are then coated with carbon containing material for improving the chemical robustness and reducing the work function. One coating process is a DC plasma deposition process in which acetylene is pumped through a DC plasma reactor to create a DC plasma for coating the cathode structure. An alternative coating process is to electrically deposit raw carbon-based material onto the surface of the emitters, and subsequently reduce the raw carbon-based material to the carbon containing material. Work function of coated emitters is typically reduced by about 0.8 to 1.0 eV.

Abstract: Integrated circuits, including field emission devices, have a resistor element of amorphous SixC1-x wherein 0<x<1, and wherein the SixC1-x incorporates at least one impurity selected from the group consisting of hydrogen, halogens, nitrogen, oxygen, sulphur, selenium, transition metals, boron, aluminum, phosphorus, gallium, arsenic, lithium, beryllium, sodium and magnesium.

Abstract: A cathode structure suitable for a flat panel display is provided with coated emitters. The emitters are formed with material, typically nickel, capable of growing to a high aspect ratio. These emitters are then coated with carbon containing material for improving the chemical robustness and reducing the work function. One coating process is a DC plasma deposition process in which acetylene is pumped through a DC plasma reactor to create a DC plasma for coating the cathode structure. An alternative coating process is to electrically deposit raw carbon-based material onto the surface of the emitters, and subsequently reduce the raw carbon-based material to the carbon containing material. Work function of coated emitters is typically reduced by about 0.8 to 1.0 eV.

Abstract: Integrated circuits, including field emission devices, have a resistor element of amorphous Si.sub.x C.sub.1-x wherein 0<x<1, and wherein the Si.sub.x C.sub.1-x incorporates at least one impurity selected from the group consisting of hydrogen, halogens, nitrogen, oxygen, sulphur, selenium, transition metals, boron, aluminum, phosphorus, gallium, arsenic, lithium, beryllium, sodium and magnesium.

Abstract: Electron field emission devices (cold cathodes), vacuum microelectronic devices and field emission displays which incorporate cold cathodes and methods of making and using same. More specifically, cold cathode devices comprising electron emitting structures grown directly onto a substrate material. The invention also relates to patterned precursor substrates for use in fabricating field emission devices and methods of making same and also to catalytically growing other electronic structures, such as films, cones, cylinders, pyramids or the like, directly onto substrates.

Abstract: Electron field emission devices (cold cathodes), vacuum microelectronic devices and field emission displays which incorporate cold cathodes and methods of making and using same. More specifically, cold cathode devices comprising electron emitting structures grown directly onto a substrate material. The invention also relates to patterned precursor substrates for use in fabricating field emission devices and methods of making same and also to catalytically growing other electronic structures, such as films, cones, cylinders, pyramids or the like, directly onto substrates.