Patents by Inventor Xuewen He

Xuewen He has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Aggregation induced emission-bacteriophage bioconjugates
    Patent number: 11944682
    Abstract: Aggregation-induced emission-bacteriophage bioconjugate including a bacteriophage covalently bonded to at least one aggregation-induced emission luminogen via an optional linker, pharmaceutical compositions including the same, and methods of preparation and use thereof.
    Type: Grant
    Filed: January 22, 2021
    Date of Patent: April 2, 2024
    Assignee: The Hong Kong University of Science and Technologyy
    Inventors: Benzhong Tang, Xuewen He
  • AGGREGATION INDUCED EMISSION-BACTERIOPHAGE BIOCONJUGATES
    Publication number: 20210228721
    Abstract: Aggregation-induced emission-bacteriophage bioconjugate including a bacteriophage covalently bonded to at least one aggregation-induced emission luminogen via an optional linker, pharmaceutical compositions including the same, and methods of preparation and use thereof.
    Type: Application
    Filed: January 22, 2021
    Publication date: July 29, 2021
    Inventors: Benzhong TANG, Xuewen HE
  • Non-volatile memory repair circuit
    Patent number: 10229025
    Abstract: An integrated circuit includes on-chip flash memory, a EEPROM, cache memory, and a repair controller. When a defective address is detected in the flash memory, data slotted to be stored at the defective address is stored in the EEPROM by the repair controller. The cache memory includes a content addressable memory (CAM) that checks read addresses with the defective memory address and if there is a match, the data stored in the EEPROM is moved to the cache so that it can be output in place of data stored at the defective location of the flash memory. The memory repair system does not require any fuses nor is the flash required to include redundant rows or columns. Further, defective addresses can be detected and repaired on-the-fly.
    Type: Grant
    Filed: May 12, 2017
    Date of Patent: March 12, 2019
    Assignee: NXP USA, INC.
    Inventors: Xuewen He, Xiaoxiang Geng, Lei Zhang
  • NON-VOLATILE MEMORY REPAIR CIRCUIT
    Publication number: 20180308562
    Abstract: An integrated circuit includes on-chip flash memory, a EEPROM, cache memory, and a repair controller. When a defective address is detected in the flash memory, data slotted to be stored at the defective address is stored in the EEPROM by the repair controller. The cache memory includes a content addressable memory (CAM) that checks read addresses with the defective memory address and if there is a match, the data stored in the EEPROM is moved to the cache so that it can be output in place of data stored at the defective location of the flash memory. The memory repair system does not require any fuses nor is the flash required to include redundant rows or columns. Further, defective addresses can be detected and repaired on-the-fly.
    Type: Application
    Filed: May 12, 2017
    Publication date: October 25, 2018
    Inventors: XUEWEN HE, Xiaoxeng Geng, Lei Zhang
  • Mixed signal IP core prototyping system
    Patent number: 8904333
    Abstract: A system for prototyping an integrated circuit (IC) that has a mixed signal intellectual property (IP) core includes implementing the IP core using discrete programmable digital ICs and discrete analog ICs by partitioning the IP core into a digital IP portion and an analog IP portion.
    Type: Grant
    Filed: April 19, 2013
    Date of Patent: December 2, 2014
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Haifeng Bai, Yin Guo, Xuewen He, Kun Wu, Lei Zhang, Shayan Zhang
  • MIXED SIGNAL IP CORE PROTOTYPING SYSTEM
    Publication number: 20140109029
    Abstract: A system for prototyping an integrated circuit (IC) that has a mixed signal intellectual property (IP) core includes implementing the IP core using discrete programmable digital ICs and discrete analog ICs by partitioning the IP core into a digital IP portion and an analog IP portion.
    Type: Application
    Filed: April 19, 2013
    Publication date: April 17, 2014
    Inventors: Haifeng Bai, Yin Guo, Xuewen He, Kun Wu, Lei Zhang, Shayan Zhang