Patents by Inventor Xuezhen JING

Xuezhen JING has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11908906
    Abstract: A semiconductor structure and a fabrication method of the semiconductor structure are provided. The method includes providing a substrate, forming a first dielectric layer and a plurality of gate structures, forming source-drain doped regions, and forming a source-drain plug. The first dielectric layer covers surfaces of the gate structure, the source-drain doped region and the source-drain plug. The method also includes forming a first plug in the first dielectric layer, and forming a second dielectric layer on the first dielectric layer. The first plug is in contact with a top surface of one of the source-drain plug and the gate structure. The second dielectric layer covers the first plug. Further, the method includes forming a second plug material film in the first and second dielectric layers. The second plug material film is in contact with the top surface of one of the source-drain plug and the gate structure.
    Type: Grant
    Filed: August 26, 2021
    Date of Patent: February 20, 2024
    Assignees: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION, SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATION
    Inventors: Hailong Yu, Xuezhen Jing, Hao Zhang, Tiantian Zhang, Jinhui Meng
  • Patent number: 11784090
    Abstract: The semiconductor structure includes a substrate; a dielectric layer formed on the substrate; an opening, formed through the dielectric layer; a contact layer formed at bottom of the opening; a blocking layer formed on a sidewall surface of the opening; and a plug formed in the opening. The plug is formed on a sidewall surface of the blocking layer and in contact with the contact layer.
    Type: Grant
    Filed: May 13, 2022
    Date of Patent: October 10, 2023
    Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation
    Inventors: Hao Zhang, Xuezhen Jing, Jingjing Tan, Tiantian Zhang, Zhangru Xiao, Zengsheng Xu
  • Patent number: 11735476
    Abstract: A semiconductor structure and its fabrication method are provided. The method includes: providing a substrate and a first metal layer in the substrate; forming a dielectric layer with a first opening exposing a portion of a top surface of the first metal layer on the substrate; bombarding the portion of the top surface of the first metal layer exposed by the first opening, by using a first sputtering treatment, to make metal materials on the top surface of the first metal layer be sputtered onto sidewalls of the first opening to form a first adhesion layer; and forming a second metal layer on a surface of the first adhesion layer and on the exposed portion of the top surface of the first metal layer using a first metal selective growth process.
    Type: Grant
    Filed: September 15, 2020
    Date of Patent: August 22, 2023
    Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation
    Inventors: Hailong Yu, Jingjing Tan, Xuezhen Jing, Wen Guo
  • Publication number: 20220277992
    Abstract: The semiconductor structure includes a substrate; a dielectric layer formed on the substrate; an opening, formed through the dielectric layer; a contact layer formed at bottom of the opening; a blocking layer formed on a sidewall surface of the opening; and a plug formed in the opening. The plug is formed on a sidewall surface of the blocking layer and in contact with the contact layer.
    Type: Application
    Filed: May 13, 2022
    Publication date: September 1, 2022
    Inventors: Hao ZHANG, Xuezhen JING, Jingjing TAN, Tiantian ZHANG, Zhangru XIAO, Zengsheng XU
  • Patent number: 11398407
    Abstract: A method for forming a semiconductor structure includes forming a dielectric layer with an opening on a substrate; forming a material film in the opening; forming a blocking film on the material film; and removing the blocking film at the bottom of the opening to expose the material film. The remaining blocking film forms an initial blocking layer. The method further includes forming a conductive-material film in the opening; performing an annealing process to form a contact layer at the bottom of the opening by making the substrate, the material film, and the conductive-material film react with each other; and planarizing the conductive-material film, the initial blocking layer, and the material film to expose the dielectric layer. The remaining initial blocking layer forms a blocking layer in the opening; and the remaining conductive-material film forms a plug in contact with the blocking layer and the contact layer.
    Type: Grant
    Filed: August 7, 2020
    Date of Patent: July 26, 2022
    Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation
    Inventors: Hao Zhang, Xuezhen Jing, Jingjing Tan, Tiantian Zhang, Zhangru Xiao, Zengsheng Xu
  • Publication number: 20220076997
    Abstract: A semiconductor device and a fabrication method of the semiconductor device are provided. The semiconductor device includes a substrate, a source-drain plug layer in the substrate, a gate structure in the substrate, and a dielectric layer disposed over the substrate and covering the gate structure and the source-drain plug layer. The dielectric layer contains a first through-hole having a bottom exposing a top surface of the source-drain plug layer, and a second through-hole having a bottom exposing a top surface of the gate structure. Further, the semiconductor device includes an interface layer disposed on each of the top surface of the source-drain plug layer exposed by the first through-hole and the top surface of the gate structure exposed by the second through-hole.
    Type: Application
    Filed: September 1, 2021
    Publication date: March 10, 2022
    Inventors: Tiantian ZHANG, Xuezhen JING
  • Publication number: 20220077291
    Abstract: A semiconductor structure and a fabrication method of the semiconductor structure are provided. The method includes providing a substrate, forming a first dielectric layer and a plurality of gate structures, forming source-drain doped regions, and forming a source-drain plug. The first dielectric layer covers surfaces of the gate structure, the source-drain doped region and the source-drain plug. The method also includes forming a first plug in the first dielectric layer, and forming a second dielectric layer on the first dielectric layer. The first plug is in contact with a top surface of one of the source-drain plug and the gate structure. The second dielectric layer covers the first plug. Further, the method includes forming a second plug material film in the first and second dielectric layers. The second plug material film is in contact with the top surface of one of the source-drain plug and the gate structure.
    Type: Application
    Filed: August 26, 2021
    Publication date: March 10, 2022
    Inventors: Hailong YU, Xuezhen JING, Hao ZHANG, Tiantian ZHANG, Jinhui MENG
  • Publication number: 20210090949
    Abstract: A semiconductor structure and its fabrication method are provided. The method includes: providing a substrate and a first metal layer in the substrate; forming a dielectric layer with a first opening exposing a portion of a top surface of the first metal layer on the substrate; bombarding the portion of the top surface of the first metal layer exposed by the first opening, by using a first sputtering treatment, to make metal materials on the top surface of the first metal layer be sputtered onto sidewalls of the first opening to form a first adhesion layer; and forming a second metal layer on a surface of the first adhesion layer and on the exposed portion of the top surface of the first metal layer using a first metal selective growth process.
    Type: Application
    Filed: September 15, 2020
    Publication date: March 25, 2021
    Inventors: Hailong YU, Jingjing TAN, Xuezhen JING, Wen GUO
  • Publication number: 20210050302
    Abstract: A semiconductor device and method for forming same are provided. The method for forming a semiconductor device includes: providing a base; forming an interlayer dielectric layer over the base; forming contact holes by etching the interlayer dielectric layer; forming a barrier layer over the base in the contact holes; and forming a metal layer over the barrier layer. The contact holes exposed a portion of a surface of the base. The metal layer fully filled the contact hole.
    Type: Application
    Filed: August 12, 2020
    Publication date: February 18, 2021
    Inventors: Tiantian ZHANG, Xuezhen JING, Zheyuan TONG, Zhangru XIAO, Hailong YU
  • Publication number: 20210043505
    Abstract: A method for forming a semiconductor structure includes forming a dielectric layer with an opening on a substrate; forming a material film in the opening; forming a blocking film on the material film; and removing the blocking film at the bottom of the opening to expose the material film. The remaining blocking film forms an initial blocking layer. The method further includes forming a conductive-material film in the opening; performing an annealing process to form a contact layer at the bottom of the opening by making the substrate, the material film, and the conductive-material film react with each other; and planarizing the conductive-material film, the initial blocking layer, and the material film to expose the dielectric layer. The remaining initial blocking layer forms a blocking layer in the opening; and the remaining conductive-material film forms a plug in contact with the blocking layer and the contact layer.
    Type: Application
    Filed: August 7, 2020
    Publication date: February 11, 2021
    Inventors: Hao ZHANG, Xuezhen JING, Jingjing TAN, Tiantian ZHANG, Zhangru XIAO, Zengsheng XU