Patents by Inventor Xun Chen

Xun Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20170041290
    Abstract: An apparatus and method of an attachment device for interfacing with an on-board diagnostic system of a vehicle is provided. The device includes an application processor configured to receive input from a terminal, control processing of the input by the on-board diagnostic system, transmit a result of the processing of the input by the on-board diagnostic system to the terminal, and a secure element interposed in the communication path between the application processor and the on-board diagnostic system, the secure element configured to filter the input of an on-board diagnostic operation that is untrusted.
    Type: Application
    Filed: February 19, 2016
    Publication date: February 9, 2017
    Inventors: Peng NING, Stephen E. MCLAUGHLIN, Michael C. GRACE, Ahmed M. AZAB, Rohan BHUTKAR, Wenbo SHEN, Xun CHEN, Yong CHOI, Ken CHEN
  • Patent number: 9397748
    Abstract: A method for detecting an optical signal-to-noise ratio (OSNR). A wavelength label loading end (11) loads a wavelength label signal in an optical signal, and sends a loading modulation depth of the wavelength label signal to an OSNR detection end (12) through a wavelength label channel or an optical monitoring channel. The OSNR detection end (12) obtains a loading modulation depth of a wavelength label signal loaded in each wavelength optical signal, parses the wavelength label signal to obtain a current modulation depth of the wavelength label signal, and obtains an OSNR value of each wavelength optical signal according to the loading modulation depth and the current modulation depth of the wavelength label signal. A system and device for detecting an OSNR applicable to OSNR tests of present optical signals with high rates of 40 G, 100 G, etc., and in particular to OSNR tests of polarization multiplexing optical signals.
    Type: Grant
    Filed: July 23, 2013
    Date of Patent: July 19, 2016
    Assignee: ZTE CORPORATION
    Inventors: Yingchun Shang, Bailin Shen, Xun Chen
  • Patent number: 9308639
    Abstract: A tool storage device includes a housing, a linkage unit, a biasing member and a locking member. The linkage unit includes a driving member, multiple storing members, and a linkage mechanism interconnecting the storing members and the driving member. The linkage unit is convertible between a retracted position, where the storing members are accommodated in the housing, and an opening position, where the storing members are driven by the driving member via the linkage mechanism to pivot so that ends of the storing members are away from the housing with different orientations. The biasing member biases the linkage unit toward the expanded position. The locking member is disposed for locking releasably the linkage unit in the retracted position.
    Type: Grant
    Filed: July 10, 2014
    Date of Patent: April 12, 2016
    Inventors: Chang-Xun Chen, Yu-Lun Chen
  • Publication number: 20160092701
    Abstract: A method for verifying data integrity of a block device is provided. The method includes providing a secure world execution environment configured to monitor changes to data blocks of a block device, within the secure world execution environment, generating a hash for changed data blocks of the block device, and within the secure world execution environment, verifying and generating a cryptographic signature.
    Type: Application
    Filed: April 10, 2015
    Publication date: March 31, 2016
    Inventors: Jitesh Shah, Song Wei, Ahmed Azab, Xun Chen, Peng Ning, Wenbo Shen, Michael Grace
  • Publication number: 20150348237
    Abstract: The invention relates to a method and technical means for rotating an original image in an image frame by an angle to have a rotated image in said image frame, wherein said image frame comprising said rotated image having empty corners lacking image data; comparing the rotated image to the original image to identify remaining corners; adding content of the remaining corners to the empty corners of the image frame comprising said rotated image.
    Type: Application
    Filed: May 28, 2015
    Publication date: December 3, 2015
    Inventor: Xun Chen
  • Publication number: 20150222354
    Abstract: A method for detecting an optical signal-to-noise ratio (OSNR). A wavelength label loading end (11) loads a wavelength label signal in an optical signal, and sends a loading modulation depth of the wavelength label signal to an OSNR detection end (12) through a wavelength label channel or an optical monitoring channel. The OSNR detection end (12) obtains a loading modulation depth of a wavelength label signal loaded in each wavelength optical signal, parses the wavelength label signal to obtain a current modulation depth of the wavelength label signal, and obtains an OSNR value of each wavelength optical signal according to the loading modulation depth and the current modulation depth of the wavelength label signal. A system and device for detecting an OSNR applicable to OSNR tests of present optical signals with high rates of 40 G, 100 G, etc., and in particular to OSNR tests of polarization multiplexing optical signals.
    Type: Application
    Filed: July 23, 2013
    Publication date: August 6, 2015
    Applicant: ZTE CORPORATION
    Inventors: Yingchun Shang, Bailin Shen, Xun Chen
  • Publication number: 20150096911
    Abstract: A tool storage device includes a housing, a linkage unit, a biasing member and a locking member. The linkage unit includes a driving member, multiple storing members, and a linkage mechanism interconnecting the storing members and the driving member. The linkage unit is convertible between a retracted position, where the storing members are accommodated in the housing, and an opening position, where the storing members are driven by the driving member via the linkage mechanism to pivot so that ends of the storing members are away from the housing with different orientations. The biasing member biases the linkage unit toward the expanded position. The locking member is disposed for locking releasably the linkage unit in the retracted position.
    Type: Application
    Filed: July 10, 2014
    Publication date: April 9, 2015
    Inventors: Chang-Xun Chen, Yu-Lun Chen
  • Patent number: 8893067
    Abstract: In one aspect, the present invention is directed to a technique of, and system for simulating, verifying, inspecting, characterizing, determining and/or evaluating the lithographic designs, techniques and/or systems, and/or individual functions performed thereby or components used therein. In one embodiment, the present invention is a system and method that accelerates lithography simulation, inspection, characterization and/or evaluation of the optical characteristics and/or properties, as well as the effects and/or interactions of lithographic systems and processing techniques.
    Type: Grant
    Filed: August 20, 2013
    Date of Patent: November 18, 2014
    Assignee: ASML Netherlands B.V.
    Inventors: Jun Ye, Yen-Wen Lu, Yu Cao, Luoqi Chen, Xun Chen
  • Publication number: 20140310553
    Abstract: A computer may assign a master device and at least one slave device. A program may direct the master device to broadcast counts based on its data acquisition clock. Then at least one slave device may receive the broadcast count and determine the difference between the clock count of the slave and the clock count of the master. The slave may use the difference of the counts to control the slave's voltage-controlled crystal oscillator.
    Type: Application
    Filed: April 10, 2013
    Publication date: October 16, 2014
    Inventors: Xun Chen, Kenneth Spikowski
  • Patent number: 8516405
    Abstract: In one aspect, the present invention is directed to a technique of, and system for simulating, verifying, inspecting, characterizing, determining and/or evaluating the lithographic designs, techniques and/or systems, and/or individual functions performed thereby or components used therein. In one embodiment, the present invention is a system and method that accelerates lithography simulation, inspection, characterization and/or evaluation of the optical characteristics and/or properties, as well as the effects and/or interactions of lithographic systems and processing techniques.
    Type: Grant
    Filed: June 26, 2012
    Date of Patent: August 20, 2013
    Assignee: ASML Netherlands B.V.
    Inventors: Jun Ye, Yen-Wen Lu, Yu Cao, Luoqi Chen, Xun Chen
  • Patent number: 8318391
    Abstract: A method for identifying process window signature patterns in a device area of a mask is disclosed. The signature patterns collectively provide a unique response to changes in a set of process condition parameters to the lithography process. The signature patterns enable monitoring of associated process condition parameters for signs of process drift, analyzing of the process condition parameters to determine which are limiting and affecting the chip yields, analyzing the changes in the process condition parameters to determine the corrections that should be fed back into the lithography process or forwarded to an etch process, identifying specific masks that do not transfer the intended pattern to wafers as intended, and identifying groups of masks that share common characteristics and behave in a similar manner with respect to changes in process condition parameters when transferring the pattern to the wafer.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: November 27, 2012
    Assignee: ASML Netherlands B.V.
    Inventors: Jun Ye, Moshe E. Preil, Xun Chen, Shauh-Teh Juang, James Wiley
  • Publication number: 20120269421
    Abstract: In one aspect, the present invention is directed to a technique of, and system for simulating, verifying, inspecting, characterizing, determining and/or evaluating the lithographic designs, techniques and/or systems, and/or individual functions performed thereby or components used therein. In one embodiment, the present invention is a system and method that accelerates lithography simulation, inspection, characterization and/or evaluation of the optical characteristics and/or properties, as well as the effects and/or interactions of lithographic systems and processing techniques.
    Type: Application
    Filed: June 26, 2012
    Publication date: October 25, 2012
    Applicant: ASML Netherlands B.V.
    Inventors: Jun Ye, Yen-Wen Lu, Yu Cao, Luogi Chen, Xun Chen
  • Patent number: 8209640
    Abstract: There are many inventions described and illustrated herein. In one aspect, the present invention is directed to a technique of, and system for simulating, verifying, inspecting, characterizing, determining and/or evaluating the lithographic designs, techniques and/or systems, and/or individual functions performed thereby or components used therein. In one embodiment, the present invention is a system and method that accelerates lithography simulation, inspection, characterization and/or evaluation of the optical characteristics and/or properties, as well as the effects and/or interactions of lithographic systems and processing techniques.
    Type: Grant
    Filed: December 9, 2010
    Date of Patent: June 26, 2012
    Assignee: ASML Netherlands B.V.
    Inventors: Jun Ye, Yen-Wen Lu, Yu Cao, Luoqi Chen, Xun Chen
  • Publication number: 20120021343
    Abstract: A method for identifying process window signature patterns in a device area of a mask is disclosed. The signature patterns collectively provide a unique response to changes in a set of process condition parameters to the lithography process. The signature patterns enable monitoring of associated process condition parameters for signs of process drift, analyzing of the process condition parameters to determine which are limiting and affecting the chip yields, analyzing the changes in the process condition parameters to determine the corrections that should be fed back into the lithography process or forwarded to an etch process, identifying specific masks that do not transfer the intended pattern to wafers as intended, and identifying groups of masks that share common characteristics and behave in a similar manner with respect to changes in process condition parameters when transferring the pattern to the wafer.
    Type: Application
    Filed: September 23, 2011
    Publication date: January 26, 2012
    Applicant: ASML Netherlands B.V.
    Inventors: Jun Ye, Moshe E. Preil, Xun Chen, Shauh-Teh Juang, James Wiley
  • Patent number: 8057967
    Abstract: A method for identifying process window signature patterns in a device area of a mask is disclosed. The signature patterns collectively provide a unique response to changes in a set of process condition parameters to the lithography process. The signature patterns enable monitoring of associated process condition parameters for signs of process drift, analyzing of the process condition parameters to determine which are limiting and affecting the chip yields, analyzing the changes in the process condition parameters to determine the corrections that should be fed back into the lithography process or forwarded to an etch process, identifying specific masks that do not transfer the intended pattern to wafers as intended, and identifying groups of masks that share common characteristics and behave in a similar manner with respect to changes in process condition parameters when transferring the pattern to the wafer.
    Type: Grant
    Filed: February 23, 2010
    Date of Patent: November 15, 2011
    Assignee: ASML Netherlands B.V.
    Inventors: Jun Ye, Moshe E. Preil, Xun Chen, Shauh-Teh Juang, James Wiley
  • Publication number: 20110083113
    Abstract: There are many inventions described and illustrated herein. In one aspect, the present invention is directed to a technique of, and system for simulating, verifying, inspecting, characterizing, determining and/or evaluating the lithographic designs, techniques and/or systems, and/or individual functions performed thereby or components used therein. In one embodiment, the present invention is a system and method that accelerates lithography simulation, inspection, characterization and/or evaluation of the optical characteristics and/or properties, as well as the effects and/or interactions of lithographic systems and processing techniques.
    Type: Application
    Filed: December 9, 2010
    Publication date: April 7, 2011
    Applicant: ASML Netherlands B.V.
    Inventors: Jun Ye, Yen-Wen Lu, Yu Cao, Luoqi Chen, Xun Chen
  • Patent number: 7873937
    Abstract: A system has been developed for simulating, verifying, inspecting, characterizing, determining and/or evaluating the lithographic designs, techniques and/or systems, and/or individual functions performed thereby or components used therein. In one embodiment, the system accelerates lithography simulation, inspection, characterization and/or evaluation of the optical characteristics and/or properties, as well as the effects and/or interactions of lithographic systems and processing techniques. In this regard, in one embodiment, the system employs a lithography simulation system architecture, including application-specific hardware accelerators, and a processing technique to accelerate and facilitate verification, characterization and/or inspection of a mask design, for example, RET design, including detailed simulation and characterization of the entire lithography process to verify that the design achieves and/or provides the desired results on final wafer pattern.
    Type: Grant
    Filed: September 26, 2006
    Date of Patent: January 18, 2011
    Assignee: ASML Netherlands B.V.
    Inventors: Jun Ye, Yen-Wen Lu, Yu Cao, Luoqi Chen, Xun Chen
  • Patent number: 7792139
    Abstract: A daisy chained ethernet network data acquisition system for use in industrial processes is shown. The system employs standard category five twisted-pair connectors, each having four twisted-pairs associated therewith. Two of the twisted-pairs are employed for transmitting and receiving command signals and data, while the remaining two are employed for transmitting a common clock and synchronizing signal to each of the various stages of the processing line at which data is to be acquired. The system thus allows for the time correlated acquisition of data from a plurality of stages or stations of a lengthy processing line by employing ethernet interconnection.
    Type: Grant
    Filed: June 26, 2006
    Date of Patent: September 7, 2010
    Assignee: DATAQ Instruments, Inc.
    Inventors: John J. Bowers, Xun Chen
  • Publication number: 20100151364
    Abstract: A method for identifying process window signature patterns in a device area of a mask is disclosed. The signature patterns collectively provide a unique response to changes in a set of process condition parameters to the lithography process. The signature patterns enable monitoring of associated process condition parameters for signs of process drift, analyzing of the process condition parameters to determine which are limiting and affecting the chip yields, analyzing the changes in the process condition parameters to determine the corrections that should be fed back into the lithography process or forwarded to an etch process, identifying specific masks that do not transfer the intended pattern to wafers as intended, and identifying groups of masks that share common characteristics and behave in a similar manner with respect to changes in process condition parameters when transferring the pattern to the wafer.
    Type: Application
    Filed: February 23, 2010
    Publication date: June 17, 2010
    Applicant: Brion Technology, Inc.
    Inventors: Jun Ye, Moshe E. Preil, Xun Chen, Shauh-Teh Juang, James Wiley
  • Patent number: D746060
    Type: Grant
    Filed: February 25, 2014
    Date of Patent: December 29, 2015
    Inventors: Chang-Xun Chen, Yu-Lun Chen