Patents by Inventor Xunlei CHEN

Xunlei CHEN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11444607
    Abstract: Disclosed is a many-bit, groupable, reconfigurable, multi-valued, electronic operator and its construction method. Each bit of the electronic operator is provided with n column calculators and one potential combiner. A data input line is connected to an input terminal of an A signal selector, and an output terminal of the A signal selector is connected to a work permitter. Another input terminal of the work permitter is connected to a reconfiguration latch, and an output terminal of the work permitter is further connected to an output validator. Another input terminal of the output validator is connected to a power supply Vcc, and an output terminal of the output validator is connected to an output generator. Another input terminal of the output generator is connected to a reconfiguration circuit, and an output terminal of the output generator is connected to the potential combiner.
    Type: Grant
    Filed: December 28, 2020
    Date of Patent: September 13, 2022
    Inventors: Yi Jin, Shan Ouyang, Ying Wang, Yunfu Shen, Junjie Peng, Shiqiang Zhou, Yuejun Liu, Xunlei Chen
  • Publication number: 20210119615
    Abstract: Disclosed is a many-bit, groupable, reconfigurable, multi-valued, electronic operator and its construction method. Each bit of the electronic operator is provided with n column calculators and one potential combiner. A data input line is connected to an input terminal of an A signal selector, and an output terminal of the A signal selector is connected to a work permitter. Another input terminal of the work permitter is connected to a reconfiguration latch, and an output terminal of the work permitter is further connected to an output validator. Another input terminal of the output validator is connected to a power supply Vcc, and an output terminal of the output validator is connected to an output generator. Another input terminal of the output generator is connected to a reconfiguration circuit, and an output terminal of the output generator is connected to the potential combiner.
    Type: Application
    Filed: December 28, 2020
    Publication date: April 22, 2021
    Inventors: Yi JIN, Shan OUYANG, Ying WANG, Yunfu SHEN, Junjie PENG, Shiqiang ZHOU, Yuejun LIU, Xunlei CHEN