Patents by Inventor Xupei Liang

Xupei Liang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Achieving ultra-high availability using a single CPU
    Patent number: 9026848
    Abstract: Techniques for achieving high-availability using a single processor (CPU). In a system comprising a multi-core processor, at least two partitions may be configured with each partition being allocated one or more cores of the multiple cores. The partitions may be configured such that one partition operates in active mode while another partition operates in standby mode. In this manner, a single processor is able to provide active-standby functionality, thereby enhancing the availability of the system comprising the processor.
    Type: Grant
    Filed: June 24, 2013
    Date of Patent: May 5, 2015
    Assignee: Brocade Communications Systems, Inc.
    Inventors: Vineet M. Abraham, Bill Ying Chin, William R. Mahoney, Aditya Saxena, Xupei Liang, Bill Jianqiang Zhou
  • Creation and deletion of logical ports in a logical switch
    Patent number: 8982898
    Abstract: A Layer 2 network switch is partitionable into a plurality of switch fabrics. The single-chassis switch is partitionable into a plurality of logical switches, each associated with one of the virtual fabrics. The logical switches behave as complete and self-contained switches. A logical switch fabric can span multiple single-chassis switch chassis. Logical switches are connected by inter-switch links that can be either dedicated single-chassis links or logical links. An extended inter-switch link can be used to transport traffic for one or more logical inter-switch links. Physical ports of the chassis are assigned to logical switches and are managed by the logical switch. Legacy switches that are not partitionable into logical switches can serve as transit switches between two logical switches.
    Type: Grant
    Filed: October 8, 2009
    Date of Patent: March 17, 2015
    Assignee: Brocade Communications Systems, Inc.
    Inventors: Sathish Kumar Gnanasekaran, Subramanian Lakshmanan, Tarun Bhatia, Badrinath Kollu, Xupei Liang, Leifang Hu, Bei Wang
  • ACHIEVING ULTRA-HIGH AVAILABILITY USING A SINGLE CPU
    Publication number: 20140095927
    Abstract: Techniques for achieving high-availability using a single processor (CPU). In a system comprising a multi-core processor, at least two partitions may be configured with each partition being allocated one or more cores of the multiple cores. The partitions may be configured such that one partition operates in active mode while another partition operates in standby mode. In this manner, a single processor is able to provide active-standby functionality, thereby enhancing the availability of the system comprising the processor.
    Type: Application
    Filed: June 24, 2013
    Publication date: April 3, 2014
    Inventors: Vineet M. Abraham, Bill Ying Chin, William R. Mahoney, Aditya Saxena, Xupei Liang, Bill Jianqiang Zhou
  • Achieving ultra-high availability using a single CPU
    Patent number: 8495418
    Abstract: Techniques for achieving high-availability using a single processor (CPU). In a system comprising a multi-core processor, at least two partitions may be configured with each partition being allocated one or more cores of the multiple cores. The partitions may be configured such that one partition operates in active mode while another partition operates in standby mode. In this manner, a single processor is able to provide active-standby functionality, thereby enhancing the availability of the system comprising the processor.
    Type: Grant
    Filed: July 23, 2010
    Date of Patent: July 23, 2013
    Assignee: Brocade Communications Systems, Inc.
    Inventors: Vineet M. Abraham, Bill Ying Chin, William R. Mahoney, Aditya Saxena, Xupei Liang, Bill Jianqiang Zhou
  • ACHIEVING ULTRA-HIGH AVAILABILITY USING A SINGLE CPU
    Publication number: 20120023309
    Abstract: Techniques for achieving high-availability using a single processor (CPU). In a system comprising a multi-core processor, at least two partitions may be configured with each partition being allocated one or more cores of the multiple cores. The partitions may be configured such that one partition operates in active mode while another partition operates in standby mode. In this manner, a single processor is able to provide active-standby functionality, thereby enhancing the availability of the system comprising the processor.
    Type: Application
    Filed: July 23, 2010
    Publication date: January 26, 2012
    Applicant: Brocade Communications Systems, Inc.
    Inventors: Vineet M. Abraham, Bill Ying Chin, William R. Mahoney, Aditya Saxena, Xupei Liang, Bill Jianqiang Zhou
  • CREATION AND DELETION OF LOGICAL PORTS IN A LOGICAL SWITCH
    Publication number: 20110085569
    Abstract: A Layer 2 network switch is partitionable into a plurality of switch fabrics. The single-chassis switch is partitionable into a plurality of logical switches, each associated with one of the virtual fabrics. The logical switches behave as complete and self-contained switches. A logical switch fabric can span multiple single-chassis switch chassis. Logical switches are connected by inter-switch links that can be either dedicated single-chassis links or logical links. An extended inter-switch link can be used to transport traffic for one or more logical inter-switch links. Physical ports of the chassis are assigned to logical switches and are managed by the logical switch. Legacy switches that are not partitionable into logical switches can serve as transit switches between two logical switches.
    Type: Application
    Filed: October 8, 2009
    Publication date: April 14, 2011
    Applicant: BROCADE COMMUNICATIONS SYSTEMS, INC.
    Inventors: Sathish Kumar Gnanasekaran, Subramanian Lakshmanan, Tarun Bhatia, Badrinath Kollu, Xupei Liang, Leifang Hu, Bei Wang