Abstract: The present disclosure describes a patterning process for a strap region in a memory cell for the removal of material between polysilicon lines. The patterning process includes depositing a first hard mask layer in a divot formed on a top portion of a polysilicon layer interposed between a first polysilicon gate structure and a second polysilicon gate; depositing a second hard mask layer on the first hard mask layer. The patterning process also includes performing a first etch to remove the second hard mask layer and a portion of the second hard mask layer from the divot, performing a second etch to remove the second hard mask layer from the divot; and performing a third etch to remove the polysilicon layer not covered by the first and second hard mask layers to form a separation between the first polysilicon gate structure and the second polysilicon structure.

Abstract: A system and methods are described for processing image data related to both 8-8 image data, corresponding to a single 8×8 image data set, and 2-4-8 image data, corresponding to two related 4×8 image data sets associated with different fields of an 8×8 image block. The image data is received and processed using separate discrete cosine transform (DCT) matrices. An 8-8 matrix processes the 8-8 image data and a 2-4-8 matrix processes the 2-4-8 image data. The matrices are used to generate forward DCT results when accessed in a normal fashion. The matrices are transposed through a column-major accessing scheme to generate inverse DCT results.

Abstract: The invention relates to compositions which exhibit anti-tumor activity and which comprise a toluene sulfonamide at a concentration not previously recognized as being efficacious for this purpose. The compositions exhibit the ability to inhibit tumor growth, shrink (i.e., necrotize) tumors, and prevent tumor formation in humans. The invention also includes methods of making and using the compositions.

Abstract: A method of forming a HSQFN (High Stand-off Quad Flat Non-leaded) package comprises providing a leadframe with bonding pads and die pads for receiving a die. Then, the die is attached on the die pad and bonding wires are connected between the bonding pads and the die for electrical connection. Molding process is used to encompass the die by compound from a first surface of the leadframe. Then, backside etching is used to etch the leadframe from a second surface of the leadframe to expose a lower surface of the compound, thereby separating the bonding pads and the die pads. A sigulation is applied to separate each individual package by cutting the leadframe and the compound.

Abstract: The lead frame package with dummy chip comprising a lead frame with a plurality of first leads, molding compound, a dummy chip and a die. Wherein the molding compound encapsulates the die and the dummy chip, the dummy chip is arranged on a lower portion of the molding compound. The die is stacked on an upper surface of the dummy chip by using an adhesive material. A plurality of bonding wires are connected between the die and an end of the plurality of leads over the dummy chip.