Patents by Inventor Y.S. Chaug

Y.S. Chaug has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080224361
    Abstract: This invention relates to an object having a display panel embedded in its top surface and processes for its manufacture. The process comprises the steps of: forming an in-mold display transfer film or foil which comprises a temporary carrier layer, a release layer, a display panel, an adhesive layer and optionally a durable layer; feeding said in-mold display transfer film or foil into a mold with the temporary carrier film in contact with the inner surface of the mold; forming an object in the mold and transferring the in-mold display transfer film or foil onto the object; removing the object formed from the mold; and simultaneously removing both temporary carrier layer and release layer.
    Type: Application
    Filed: May 21, 2008
    Publication date: September 18, 2008
    Inventors: Rong-Chang Liang, Scott C.J. Tseng, Jerry Chung, HongMei Zang, Xiaojia Wang, Y. S. Chaug, Feng Y. Dai
  • Publication number: 20050163940
    Abstract: This invention relates to an object having a display panel embedded in its top surface and processes for its manufacture.
    Type: Application
    Filed: June 3, 2004
    Publication date: July 28, 2005
    Inventors: Rong-Chang Liang, Scott Tseng, Jerry Chung, HongMei Zang, Xiaojia Wang, Y.S. Chaug, Feng Dai
  • Publication number: 20030206331
    Abstract: A matrix driven electrophoretic display with a multi-layer back plane is disclosed. The display comprises a top electrode layer, a display cell layer, and a multi-layer back plane. In one embodiment, the multi-layer back plane comprises an electrode formed on the top surface of the top substrate of the multi-layer back plane, a conductive via structure through the substrate, and a conductive trace connected electrically to the via structure at the bottom surface of the first substrate, whereby an electrical connection may be made from the electrode to a structure or component not located immediately beneath the electrode in the multi-layer back plane. In other embodiments, the multi-layer back plane may comprise additional layers and via holes, as needed to connect the electrode with the appropriate switching elements and/or driver elements, as applicable.
    Type: Application
    Filed: April 23, 2003
    Publication date: November 6, 2003
    Inventors: Jerry Chung, Jack Hou, Y.S. Chaug, Jeanne E. Haubrich, Rong-Chang Liang
  • Publication number: 20030203101
    Abstract: A process for forming a patterned conductive structure on a substrate is disclosed. A pattern is printed with a material, such as a masking coating or an ink, on the substrate, the pattern being such that, in one embodiment, the desired conductive structures will be formed in the areas where the printed material is not present, i.e., a negative image of conductive structure to be formed is printed. In another embodiment, the pattern is printed with a material that is difficult to strip from the substrate, and the desired conductive structures will be formed in the areas where the printed material is present, i.e., a positive image of the conductive structure is printed. The conductive material is deposited on the patterned substrate, and the undesired area is stripped, leaving behind the patterned electrode structures.
    Type: Application
    Filed: April 23, 2003
    Publication date: October 30, 2003
    Applicant: SiPix Imaging, Inc.
    Inventors: Jeanne E. Haubrich, Y. S. Chaug, Zarng-Arh George Wu, Abbas Hosseini, Paul Gendler, Rong-Chang Liang