Patents by Inventor Ya Chang

Ya Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12008253
    Abstract: An embedded system includes a host controller circuit and a microcontroller circuit. The host controller circuit is configured to access a storage device to obtain an address of a first firmware file in the storage device. The microcontroller circuit is configured to determine whether a memory circuit is being accessed by other circuits, in which the memory circuit includes memory blocks. If the memory circuit is not being accessed by the other circuits, the microcontroller circuit is further to control the host controller circuit to write the first firmware file to a first block of the memory blocks according to the address.
    Type: Grant
    Filed: October 14, 2022
    Date of Patent: June 11, 2024
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Ya-Kun Cai, Hong Chang, Wen-Juan Ni
  • Patent number: 12009211
    Abstract: Methods are provided herein for forming spacers on a patterned substrate. A self-aligned multiple patterning (SAMP) process is utilized for patterning structures, spacers formed adjacent mandrels, on a substrate. In one embodiment, a novel approach of etching titanium oxide (TiO2) spacers is provided. Highly anisotropic etching of the spacer along with a selective top deposition is provided. In one embodiment, an inductively coupled plasma (ICP) etch tool is utilized. The etching process may be achieved as a one-step etching process. More particularly, a protective layer may be selectively formed on the top of the spacer to protect the mandrel as well as minimize the difference of the etching rates of the spacer top and the spacer bottom. In one embodiment, the techniques may be utilized to etch TiO2 spacers formed along amorphous silicon mandrels using an ICP etch tool utilizing a one-step etch process.
    Type: Grant
    Filed: November 12, 2021
    Date of Patent: June 11, 2024
    Assignee: Tokyo Electron Limited
    Inventors: Ya-Ming Chen, Katie Lutker-Lee, Eric Chih-Fang Liu, Angelique Raley, Stephanie Oyola-Reynoso, Shihsheng Chang
  • Patent number: 12002749
    Abstract: Some embodiments of the present disclosure relate to an integrated chip, including a semiconductor substrate and a dielectric layer disposed over the semiconductor substrate. A pair of metal lines are disposed over the dielectric layer and laterally spaced apart from one another by a cavity. A barrier layer structure extends along nearest neighboring sidewalls of the pair of metal lines such that the cavity is defined by inner sidewalls of the barrier layer structure and a top surface of the dielectric layer.
    Type: Grant
    Filed: August 26, 2021
    Date of Patent: June 4, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Hsin-Yen Huang, Ting-Ya Lo, Shao-Kuan Lee, Chi-Lin Teng, Cheng-Chin Lee, Shau-Lin Shue, Hsiao-Kang Chang
  • Publication number: 20240177319
    Abstract: Many unsupervised domain adaptation (UDA) methods have been proposed to bridge the domain gap by utilizing domain invariant information. Most approaches have chosen depth as such information and achieved remarkable successes. Despite their effectiveness, using depth as domain invariant information in UDA tasks may lead to multiple issues, such as excessively high extraction costs and difficulties in achieving a reliable prediction quality. As a result, we introduce Edge Learning based Domain Adaptation (ELDA), a framework which incorporates edge information into its training process to serve as a type of domain invariant information. Our experiments quantitatively and qualitatively demonstrate that the incorporation of edge information is indeed beneficial and effective, and enables ELDA to outperform the contemporary state-of-the-art methods on two commonly adopted benchmarks for semantic segmentation based UDA tasks.
    Type: Application
    Filed: November 24, 2023
    Publication date: May 30, 2024
    Applicant: MEDIATEK INC.
    Inventors: Ting-Hsuan Liao, Huang-Ru Liao, Shan-Ya Yang, Jie-En Yao, Li-Yuan Tsao, Hsu-Shen Liu, Bo-Wun Cheng, Chen-Hao Chao, Chia-Che Chang, Yi-Chen Lo, Chun-Yi Lee
  • Publication number: 20240162084
    Abstract: A method for manufacturing a semiconductor structure includes preparing a dielectric structure formed with trenches respectively defined by lateral surfaces of the dielectric structure, forming spacer layers on the lateral surfaces, filling an electrically conductive material into the trenches to form electrically conductive features, selectively depositing a blocking layer on the dielectric structure, selectively depositing a dielectric material on the electrically conductive features to form a capping layer, removing the blocking layer and the dielectric structure to form recesses, forming sacrificial features in the recesses, forming a sustaining layer to cover the sacrificial features; and removing the sacrificial features to obtain the semiconductor structure formed with air gaps confined by the sustaining layer and the spacer layers.
    Type: Application
    Filed: January 26, 2024
    Publication date: May 16, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsin-Yen HUANG, Ting-Ya LO, Shao-Kuan LEE, Chi-Lin TENG, Cheng-Chin LEE, Shau-Lin SHUE, Hsiao-Kang CHANG
  • Publication number: 20240142748
    Abstract: An optical system is provided. The optical system is used for disposing on an electronic device. The optical system includes a movable portion, a fixed portion, a first driving assembly, and a support module. The movable portion is used for connecting to an optical module. The fixed portion is affixed on the electronic device, and the movable portion is movable relative to the fixed portion. The first driving assembly is used for driving the movable portion to move relative to the fixed portion. The movable portion is movably connected to the fixed portion through the support module.
    Type: Application
    Filed: January 4, 2024
    Publication date: May 2, 2024
    Inventors: Ying-Jen WANG, Ya-Hsiu WU, Chen-Chi KUO, Chao-Chang HU, Yi-Ho CHEN, Che-Wei CHANG, Ko-Lun CHAO, Sin-Jhong SONG
  • Patent number: 11939212
    Abstract: A MEMS device is provided. The MEMS device includes a substrate having at least one contact, a first dielectric layer disposed on the substrate, at least one metal layer disposed on the first dielectric layer, a second dielectric layer disposed on the first dielectric layer and the metal layer and having a recess structure, and a structure layer disposed on the second dielectric layer and having an opening. The opening is disposed on and corresponds to the recess structure, and the cross-sectional area at the bottom of the opening is smaller than the cross-sectional area at the top of the recess structure. The MEMS device also includes a sealing layer, and at least a portion of the sealing layer is disposed in the opening and the recess structure. The second dielectric layer, the structure layer, and the sealing layer define a chamber.
    Type: Grant
    Filed: August 25, 2021
    Date of Patent: March 26, 2024
    Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Heng-Chung Chang, Jhih-Jie Huang, Chih-Ya Tsai, Jing-Yuan Lin
  • Publication number: 20240094600
    Abstract: An optical element driving mechanism is provided and includes a fixed assembly, a movable assembly and a first driving assembly. The movable assembly is movable relative to the fixed assembly. The first driving assembly is configured to drive the movable assembly to move relative to the fixed assembly. The optical element driving mechanism further includes a first opening, and an external light beam travels along a first axis to pass through the first opening.
    Type: Application
    Filed: September 15, 2023
    Publication date: March 21, 2024
    Inventors: Tso-Hsiang WU, Chao-Chang HU, Yung-Yun CHEN, Ya-Hsiu WU
  • Publication number: 20240085797
    Abstract: A method of controlling an extreme ultraviolet (EUV) lithography system is disclosed. The method includes irradiating a target droplet with EUV radiation, detecting EUV radiation reflected by the target droplet, determining aberration of the detected EUV radiation, determining a Zernike polynomial corresponding to the aberration, and performing a corrective action to reduce a shift in Zernike coefficients of the Zernike polynomial.
    Type: Application
    Filed: November 13, 2023
    Publication date: March 14, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ting-Ya CHENG, Han-Lung CHANG, Shi-Han SHANN, Li-Jui CHEN, Yen-Shuo SU
  • Publication number: 20240088023
    Abstract: An interconnect structure includes a dielectric layer, a first conductive feature, a hard mask layer, a conductive layer, and a capping layer. The first conductive feature is disposed in the dielectric layer. The hard mask layer is disposed on the first conductive feature. The conductive layer includes a first portion and a second portion, the first portion of the conductive layer is disposed over at least a first portion of the hard mask layer, and the second portion of the conductive layer is disposed over the dielectric layer. The hard mask layer and the conductive layer are formed by different materials. The capping layer is disposed on the dielectric layer and the conductive layer.
    Type: Application
    Filed: November 20, 2023
    Publication date: March 14, 2024
    Inventors: Shao-Kuan LEE, Kuang-Wei YANG, Cherng-Shiaw TSAI, Cheng-Chin LEE, Ting-Ya LO, Chi-Lin TENG, Hsin-Yen HUANG, Hsiao-Kang CHANG, Shau-Lin SHUE
  • Patent number: 11923243
    Abstract: A method for manufacturing a semiconductor structure includes preparing a dielectric structure formed with trenches respectively defined by lateral surfaces of the dielectric structure, forming spacer layers on the lateral surfaces, filling an electrically conductive material into the trenches to form electrically conductive features, selectively depositing a blocking layer on the dielectric structure, selectively depositing a dielectric material on the electrically conductive features to form a capping layer, removing the blocking layer and the dielectric structure to form recesses, forming sacrificial features in the recesses, forming a sustaining layer to cover the sacrificial features; and removing the sacrificial features to obtain the semiconductor structure formed with air gaps confined by the sustaining layer and the spacer layers.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: March 5, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Hsin-Yen Huang, Ting-Ya Lo, Shao-Kuan Lee, Chi-Lin Teng, Cheng-Chin Lee, Shau-Lin Shue, Hsiao-Kang Chang
  • Publication number: 20220366254
    Abstract: An image processing model training method includes inputting image data in a training dataset into an image processing model to perform processing, to obtain a processing result corresponding to the image data, where parameters of n1 neurons are scaled up, and parameters of n2 neurons are scaled down in the image processing model, calculating an error between an annotation result of the image data in the training dataset and the processing result, and adjusting parameters of the image processing model based on the error between the annotation result and the processing result, where n1 and n2 are positive integers.
    Type: Application
    Filed: July 22, 2022
    Publication date: November 17, 2022
    Inventors: Shengyuan Zou, Ya Chang
  • Patent number: 11472129
    Abstract: A cap and a method for forming the same are provided. An integrally formed outer layer of fabric and an integrally formed moldable layer are adhesively bonded together to form a moldable panel. A curved edge of the moldable panel is then formed by a mold. After that, the moldable panel and at least one second panel are connected to form a crown, to which a peak is subsequently connected to form the cap. Once the curved edge of the moldable panel is formed by heating and pressure application through the mold, the integrally formed moldable layer keeps the moldable panel in shape, so there is no need to support the outer layer of fabric and curve, for example, the front panel with two pieces of buckram that are stitched together, as is conventionally required.
    Type: Grant
    Filed: June 15, 2021
    Date of Patent: October 18, 2022
    Inventor: Ya-Chang Hwang
  • Publication number: 20220329880
    Abstract: A video stream processing method and apparatus are provided. The method includes obtaining an image set of a target person from a multi-channel video stream, the multi-channel video stream being obtained for a same scene by a plurality of cameras, and an image in the image set includes a front face image of the target person; determining a virtual viewpoint in a target-person view mode based on the image in the image set; and projecting, based on a depth map of a target image and a pose of a real viewpoint corresponding to the target image, the target image onto an imaging plane corresponding to the virtual viewpoint to obtain a video stream in the target-person view mode, the target image intersecting with a vision field of the target person in the multi-channel video stream.
    Type: Application
    Filed: June 28, 2022
    Publication date: October 13, 2022
    Applicant: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Xingshi ZHANG, Ya Chang
  • Publication number: 20220211137
    Abstract: A cap and a method for forming the same are provided. An integrally formed outer layer of fabric and an integrally formed moldable layer are adhesively bonded together to form a moldable front panel. A curved front side of the front panel is then formed by a mold. After that, the front panel and a plurality of side panels are connected to form a crown, and a peak is subsequently connected to the front panel of the crown to form the cap. Once the curved front side of the front panel is formed by heating and pressure application through the mold, the integrally formed moldable layer keeps the front panel in shape, so there is no need to support the outer layer of fabric and curve the front panel with two pieces of buckram that are stitched together, as is conventionally required.
    Type: Application
    Filed: January 4, 2021
    Publication date: July 7, 2022
    Inventor: YA-CHANG HWANG
  • Publication number: 20220184896
    Abstract: A cap and a method for forming the same are provided. An integrally formed outer layer of fabric and an integrally formed moldable layer are adhesively bonded together to form a moldable panel. A curved edge of the moldable panel is then formed by a mold. After that, the moldable panel and at least one second panel are connected to form a crown, to which a peak is subsequently connected to form the cap. Once the curved edge of the moldable panel is formed by heating and pressure application through the mold, the integrally formed moldable layer keeps the moldable panel in shape, so there is no need to support the outer layer of fabric and curve, for example, the front panel with two pieces of buckram that are stitched together, as is conventionally required.
    Type: Application
    Filed: June 15, 2021
    Publication date: June 16, 2022
    Inventor: YA-CHANG HWANG
  • Publication number: 20210118674
    Abstract: The present disclosure provides a method for semiconductor manufacturing in accordance with some embodiments. The method includes providing a substrate and a patterning layer over the substrate and forming a plurality of openings in the patterning layer. The substrate includes a plurality of features to receive a treatment process. The openings partially overlap with the features from a top view while a portion of the features remains covered by the patterning layer. Each of the openings is free of concave corners. The method further includes performing an opening expanding process to enlarge each of the openings and performing a treatment process to the features through the openings. After the opening expanding process, the openings fully overlap with the features from the top view.
    Type: Application
    Filed: December 7, 2020
    Publication date: April 22, 2021
    Inventors: Yu-Tien Shen, Ya-Wen Yeh, Wei-Liang Lin, Ya Chang, Yung-Sung Yen, Wei-Hao Wu, Li-Te Lin, Ru-Gun Liu, Kuei-Shun Chen
  • Patent number: 10946062
    Abstract: Disclosed are methods and compositions useful in preventing or treating a metabolic disorder by using a protein having an amino acid sequence as set forth in SEQ ID NO: 1.
    Type: Grant
    Filed: February 26, 2020
    Date of Patent: March 16, 2021
    Assignee: EUSOL BIOTECH CO., LTD.
    Inventors: Jin-Ding Huang, Wan-Ya Chang, Che-Ming Yeh
  • Patent number: D986641
    Type: Grant
    Filed: October 21, 2020
    Date of Patent: May 23, 2023
    Inventor: Ching-Ya Chang
  • Patent number: D1008198
    Type: Grant
    Filed: January 7, 2022
    Date of Patent: December 19, 2023
    Assignee: EPISTAR CORPORATION
    Inventors: Yao-Ning Chan, Tzu-Yun Feng, Yun-Ya Chang