Abstract: A sensor package structure includes a substrate, a sensor chip and a ring-shaped solder mask frame those are disposed on the substrate, a ring-shaped support disposed on a top side of the annular solder mask frame, and a light permeable member that is disposed on the ring-shaped support. The sensor chip is electrically coupled to the substrate. A top surface of the sensor chip has a sensing region, and the sensing region is spaced apart from an outer lateral side of the sensor chip by a distance less than 300 ?m. The ring-shaped solder mask frame surrounds and contacts the outer lateral side of the sensor chip. The light permeable member, the ring-shaped support, and the sensor chip jointly define an enclosed space.

Abstract: A sensor package structure includes a substrate, a sensor chip and a ring-shaped solder mask frame those are disposed on the substrate, a ring-shaped support disposed on a top side of the annular solder mask frame, and a light permeable member that is disposed on the ring-shaped support. The sensor chip is electrically coupled to the substrate. A top surface of the sensor chip has a sensing region, and the sensing region is spaced apart from an outer lateral side of the sensor chip by a distance less than 300 ?m. The ring-shaped solder mask frame surrounds and contacts the outer lateral side of the sensor chip. The light permeable member, the ring-shaped support, and the sensor chip jointly define an enclosed space.

Abstract: A method for fabricating semiconductor device is disclosed. First, a substrate is provided, a gate structure is formed on the substrate, a spacer is formed around the gate structure, and an epitaxial layer is formed in the substrate adjacent to the spacer. Preferably, the step of forming the epitaxial layer further includes: forming a buffer layer in the substrate; forming a bulk layer on the buffer layer; forming a linear gradient cap on the bulk layer, and forming a silicon cap on the linear gradient cap. Preferably, the etching to deposition ratio of the linear gradient cap is greater than 50% and less than 100%.

Abstract: A method for fabricating semiconductor device is disclosed. First, a substrate is provided, a gate structure is formed on the substrate, a spacer is formed around the gate structure, and an epitaxial layer is formed in the substrate adjacent to the spacer. Preferably, the step of forming the epitaxial layer further includes: forming a buffer layer in the substrate; forming a bulk layer on the buffer layer; forming a linear gradient cap on the bulk layer, and forming a silicon cap on the linear gradient cap. Preferably, the etching to deposition ratio of the linear gradient cap is greater than 50% and less than 100%.

Abstract: A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate; and forming an epitaxial layer on the substrate, in which an etching to deposition ratio of the epitaxial layer is greater than 50%.