Patents by Inventor Yadong Li
Yadong Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 12335141Abstract: Examples described herein relate to a switch configured to allocate packet processing resources, from a pool of packet processing resources, to multiple applications, wherein the pool of packet processing resources comprise configurable packet processing pipelines of one or more network devices and packet processing resources of one or more servers. In some examples, the configurable packet processing pipelines and the packet processing resources are to perform one or more of: network switch operations, microservice communications, and/or block storage operations. In some examples, the network switch operations comprise one or more of: application of at least one access control list (ACL), packet forwarding, packet routing, and/or Virtual Extensible LAN (VXLAN) or GENEVE termination. In some examples, the microservice communications comprise one or more of: packet routing between microservices and/or load balancing of utilized microservices.Type: GrantFiled: April 23, 2021Date of Patent: June 17, 2025Assignee: Intel CorporationInventors: Shaopeng He, Haitao Kang, Cunming Liang, Anjali Singhai Jain, Parthasarathy Sarangam, Yadong Li
-
Patent number: 12323482Abstract: Examples described herein relate to a switch comprising a programmable data plane pipeline, wherein the programmable data plane pipeline is configured to provide microservice-to-microservice communications within a service mesh. In some examples, to provide microservice-to-microservice communications within a service mesh, the programmable data plane pipeline is to perform a forwarding operation for a communication from a first microservice to a second microservice. In some examples, to perform a forwarding operation for a communication from a first microservice to a second microservice, the programmable data plane pipeline is to utilize a reliable transport protocol.Type: GrantFiled: April 23, 2021Date of Patent: June 3, 2025Assignee: Intel CorporationInventors: Shaopeng He, Cunming Liang, Haitao Kang, Hongjun Ni, Jiang Yu, Ziye Yang, Anjali Singhai Jain, Daniel Daly, Yadong Li, Ping Yu, Bo Cui, Jingjing Wu, Liang Ma, Changpeng Liu
-
Patent number: 12314596Abstract: Methods and apparatus for end-to-end data plane offloading for distributed storage using protocol hardware and Protocol Independent Switch Architecture (PISA) devices. Hardware-based data plane forwarding is implemented in compute and storage switches that comprise smart server switches running software executing in a kernel and user space. The compute switch is coupled to one or more compute servers/nodes and the storage server is coupled to one or more storage servers or storage arrays. The hardware-based data plane forwarding facilitates an end-to-end data plane between the computer server(s) and storage server(s)/array(s) that is offloaded to hardware. In one example the software comprises Ceph components used to implement control plane operations in connection with hardware offloaded data plane operations, and storage traffic employs the NVMe-oF protocol and the kernels include NVMe-oF modules. In one aspect the hardware-based data plane forwarding is implemented using programmable P4switch chips.Type: GrantFiled: November 9, 2020Date of Patent: May 27, 2025Assignee: Intel CorporationInventors: Shaopeng He, Yadong Li, Ziye Yang, Changpeng Liu, Haitao Kang, Cunming Liang, Gang Cao, Scott Peterson, Sujoy Sen, Yi Zou, Arun Raghunath
-
Publication number: 20250141794Abstract: Examples described herein relate to a network interface device. In some examples, the network interface device includes a host interface; a direct memory access (DMA) circuitry; a network interface; and circuitry. The circuitry can be configured to: apply, for a tunnel packet, a single match-action rule that comprises a value of the encapsulation header of the tunnel packet and a value of the encapsulated header, wherein the single match-action rule is based on two or more match-action rules.Type: ApplicationFiled: November 24, 2023Publication date: May 1, 2025Inventors: Xiao WANG, Sridhar SAMUDRALA, Zhirun YAN, Ji LI, Mohammad Abdul AWAL, Qi ZHANG, Ping YU, Yadong LI, Hieu TRAN, Jayaprakash SHANMUGAM
-
Publication number: 20250083204Abstract: Embodiments of the present disclosure disclose a Cupriavidus metallidurans CML2, wherein the Cupriavidus metallidurans CML2 is deposited in the China Center for Type Culture Collection with a depository number CCTCC NO: M20231365, and a 16s rDNA of the Cupriavidus metallidurans CML2 has a nucleotide sequence of SEQ ID No. 1.Type: ApplicationFiled: February 27, 2024Publication date: March 13, 2025Applicant: HUBEI UNIVERSITYInventors: Xuejing YU, Yong YANG, Yuan ZHANG, Xianhua ZHANG, Yadong LI, Shan WU, Linjie LI, Chang GAO, Yue LU, Tong WU
-
Patent number: 12242748Abstract: Examples described herein relate to accessing an initiator as a Non-Volatile Memory Express (NMVe) device. In some examples, the initiator is configured with an address space, configured in kernel or user space, for access by a virtualized execution environment. In some examples, the initiator to copy one or more storage access commands from the virtualized execution environment into a queue for access by a remote direct memory access (RDMA) compatible network interface. In some examples, the network interface to provide Non-Volatile Memory Express over Fabrics (NVMe-oF) compatible commands based on the one or more storage access commands to a target storage device. In some examples, the initiator is created as a mediated device in kernel space or user space of a host system. In some examples, configuration of a physical storage pool address of the target storage device for access by the virtualized execution environment occurs by receipt of the physical storage pool address in a configuration command.Type: GrantFiled: June 23, 2020Date of Patent: March 4, 2025Assignee: Intel CorporationInventors: Shaopeng He, Yadong Li, Ziye Yang, Changpeng Liu, Banghao Ying, Robert O. Sharp
-
Publication number: 20250068438Abstract: Described herein are technique to enable the autonomous generation of configurations for a network environment, including but not limited to an edge network of a datacenter. Additional embodiments include prompt-based generation of network and device configurations and neural network based systems for adaptive network management.Type: ApplicationFiled: November 13, 2024Publication date: February 27, 2025Applicant: Intel CorporationInventors: Mateo Guzman, Marcos Carranza, Daniel Biederman, Chihjen Chang, Jeremy Petsinger, Yadong Li, Mitu Aggarwal, Suyog Kulkarni, Mariano Ortega de Mues, Rajesh Poornachandran, Cesar Martinez, Mats Agerstam, Francesc Guim Bernat, Karthik Kumar, Usharani Ayyalasomayajula
-
Publication number: 20250036783Abstract: An apparatus is disclosed that includes a network interface device comprising processors to implement network interface device functionality and communication protocol engine circuitry, wherein the network interface device is to: receive a request to write data to a memory node communicably coupled to the network interface device; identify network information corresponding to the request, wherein the network information includes at least one of quality of service (QoS), physical function (PF), virtual function (VF), name space identifier (NSID), flow ID, service level objectives (SLOs), or process address space ID (PASID); identify characteristics of the memory node, wherein the characteristics include at least page size of the memory node; and cause the data to be coalesced with other data on the memory node based on the network information and the characteristics.Type: ApplicationFiled: October 15, 2024Publication date: January 30, 2025Applicant: Intel CorporationInventors: Daniel Biederman, Yadong Li, Hemant Koka, Jackson Ellis, Salma Johnson
-
Patent number: 12199888Abstract: Examples described herein relate to offload reliable transport management to a network interface device and store packets to be resent, based on received packet receipt acknowledgements (ACKs), into one or more kernel space queues that are also accessible in user space.Type: GrantFiled: January 29, 2024Date of Patent: January 14, 2025Assignee: Intel CorporationInventors: Shaopeng He, Cunming Liang, Jiang Yu, Ziye Yang, Ping Yu, Bo Cui, Jingjing Wu, Liang Ma, Hongjun Ni, Zhiguo Wen, Changpeng Liu, Anjali Singhai Jain, Daniel Daly, Yadong Li
-
Patent number: 12177135Abstract: Examples described herein relate to a network interface that includes an initiator device to determine a storage node associated with an access command based on an association between an address in the command and a storage node. The network interface can include a redirector to update the association based on messages from one or more remote storage nodes. The association can be based on a look-up table associating a namespace identifier with prefix string and object size. In some examples, the access command is compatible with NVMe over Fabrics. The initiator device can determine a remote direct memory access (RDMA) queue-pair (QP) lookup for use to perform the access command.Type: GrantFiled: October 21, 2022Date of Patent: December 24, 2024Assignee: Intel CorporationInventors: Yadong Li, Scott D. Peterson, Sujoy Sen, David B. Minturn
-
Patent number: 12153962Abstract: The disclosure concerns at least one processor that can execute a polling group to poll for storage transactions associated with a first group of one or more particular queue identifiers. The disclosure concerns at least one processor is configured to: execute a second polling group on a second processor, wherein the second polling group is to poll for storage transactions for a second group of one or more particular queue identifiers that are different than the one or more particular queue identifiers of the first group, wherein the second group of one or more particular queue identifiers are associated with one or more queues that can be accessed using the second polling group and not the first polling group.Type: GrantFiled: April 15, 2020Date of Patent: November 26, 2024Assignee: Intel CorporationInventors: Ziye Yang, James R. Harris, Kiran Patil, Benjamin Walker, Sudheer Mogilappagari, Yadong Li, Mark Wunderlich, Anil Vasudevan
-
Patent number: 12106916Abstract: The present invention relates to a relay protective device, a construction machine, a relay protection control method and apparatus, and a computer readable storage medium.Type: GrantFiled: February 7, 2021Date of Patent: October 1, 2024Assignee: XUZHOU XCMG EXCAVATOR MACHINERY CO., LTDInventors: Yadong Li, Jiawen Geng, Jian Zhang, Bujun Dong, Yuzhong Dong, Fanjian Meng, Feifei Zhao, Meng Wen
-
Publication number: 20240283756Abstract: Examples described herein relate to offload reliable transport management to a network interface device and store packets to be resent, based on received packet receipt acknowledgements (ACKs), into one or more kernel space queues that are also accessible in user space.Type: ApplicationFiled: January 29, 2024Publication date: August 22, 2024Inventors: Shaopeng HE, Cunming LIANG, Jiang YU, Ziye YANG, Ping YU, Bo CUI, Jingjing WU, Liang MA, Hongjun NI, Zhiguo WEN, Changpeng LIU, Anjali Singhai JAIN, Daniel DALY, Yadong LI
-
Publication number: 20240264871Abstract: The disclosure concerns at least one processor that can execute a polling group to poll for storage transactions associated with a first group of one or more particular queue identifiers. The disclosure concerns at least one processor is configured to: execute a second polling group on a second processor, wherein the second polling group is to poll for storage transactions for a second group of one or more particular queue identifiers that are different than the one or more particular queue identifiers of the first group, wherein the second group of one or more particular queue identifiers are associated with one or more queues that can be accessed using the second polling group and not the first polling group.Type: ApplicationFiled: March 27, 2024Publication date: August 8, 2024Applicant: Intel CorporationInventors: Ziye YANG, James R. HARRIS, Kiran PATIL, Benjamin WALKER, Sudheer MOGILAPPAGARI, Yadong LI, Mark WUNDERLICH, Anil VASUDEVAN
-
Publication number: 20240211392Abstract: Examples described herein relate to circuitry to allocate an Non-volatile Memory Express (NVMe) bounce buffer in virtual memory that is associated with an NVMe command and perform an address translation to an NVMe bounce buffer based on receipt of a response to the NVMe command from an NVMe target. In some examples, the circuitry is to translate the virtual address to a physical address for the NVMe bounce buffer based on receipt of a response to the NVMe command from an NVMe target.Type: ApplicationFiled: February 6, 2024Publication date: June 27, 2024Inventors: Salma Mirza JOHNSON, Jose NIELL, Bradley A. BURRES, Jackson ELLIS, Yadong LI, Jayaram BHAT, Tony HURSON
-
Patent number: 11936571Abstract: Examples described herein relate to offload reliable transport management to a network interface device and store packets to be resent, based on received packet receipt acknowledgements (ACKs), into one or more kernel space queues that are also accessible in user space.Type: GrantFiled: November 4, 2022Date of Patent: March 19, 2024Assignee: Intel CorporationInventors: Shaopeng He, Cunming Liang, Jiang Yu, Ziye Yang, Ping Yu, Bo Cui, Jingjing Wu, Liang Ma, Hongjun Ni, Zhiguo Wen, Changpeng Liu, Anjali Singhai Jain, Daniel Daly, Yadong Li
-
Publication number: 20240061903Abstract: Circuits and methods for determining a maximum bias for computing softmax on a tensor include a processor circuit configured to transform in parallel, elements of each group of a plurality of groups of elements of a tensor X into respective power-of-two elements. The respective power-of-two element from element xt of the tensor is pt, pt=(xt*log2e), and pt has an integer part and a fraction part. A first comparison circuit (204) is configured to determine respective group-level biases for the groups. The group-level bias of groupm is dm, and dm is an integer part of a maximum of the power-of-two elements of groupm. A second comparison circuit is configured to determine a greatest one of the respective group-level biases to be a tensor-level bias, dmax.Type: ApplicationFiled: August 22, 2022Publication date: February 22, 2024Applicant: Xilinx, Inc.Inventors: Wenzong Yang, Wang Xi, Yadong Li, Junbin Wang, Shaoxia Fang
-
Publication number: 20240028381Abstract: A network interface device executes an input/output (I/O) virtualization manager to identify a virtual device defined to include resources of a particular virtual functions in a plurality of virtual functions associated with a physical function of a device. An operation is identified to be performed between the virtual device and a system image hosted by a host system coupled to the network interface device. The network interface device emulates the virtual device in the operation using the I/O virtualization manager.Type: ApplicationFiled: September 28, 2023Publication date: January 25, 2024Applicant: Intel CorporationInventors: Shaopeng He, Yadong Li, Anjali Singhai Jain, Eliel Louzoun, Israel Ben-Shahar, Brad A. Burres, Bartosz Pawlowski, Anton Nadezhdin, Rashmi Hanagal Nagabhushana, Rupin H. Vakharwala
-
Publication number: 20230352257Abstract: The present invention relates to a relay protective device, a construction machine, a relay protection control method and apparatus, and a computer readable storage medium.Type: ApplicationFiled: February 7, 2021Publication date: November 2, 2023Applicant: XUZHOU XCMG EXCAVATOR MACHINERY CO., LTDInventors: Yadong LI, Jiawen GENG, Jian ZHANG, Bujun DONG, Yuzhong DONG, Fanjian MENG, Feifei ZHAO, Meng WEN
-
Patent number: 11769065Abstract: An output rule specified via a distributed system execution request data structure for a requested calculation is determined, and a current rule is initialized to the output rule. A rule lookup table data structure is queried to determine a set of matching rules, corresponding to the current rule. The best matching rule is selected. A logical dependency graph (LDG) data structure is generated by adding LDG nodes and LDG edges corresponding to the best matching rule, precedent rules of the best matching rule, and precedent rules of each precedent rule. An execution complexity gauge value and a set of distributed worker processes are determined. The LDG data structure is divided into a set of subgraphs. Each worker process is initialized with the subgraph assigned to it. Execution of the requested calculation is coordinated and a computation result of the LDG node corresponding to the output rule is obtained.Type: GrantFiled: March 12, 2020Date of Patent: September 26, 2023Assignee: Julius Technologies LLCInventor: Yadong Li