Abstract: A processing system for monitoring the power-on self-test information is used for monitoring an operating state of a complex programmable logic device (CPLD) of a main board. The processing system includes a basic input/output system (BIOS) device, a CPLD and a monitoring device. The BIOS device sends power-on self-test information at a first frequency. The CPLD is electrically connected to the BIOS device. The CPLD further includes a first in first out (FIFO) register, and the FIFO register is used for storing the received power-on self-test information. The CPLD sends the power-on self-test information stored in the FIFO register at a second frequency. The monitoring device is electrically connected to the CPLD. The monitoring device is used for receiving the power-on self-test information sent from the CPLD.

Abstract: A system and method for monitoring an input/output port status of peripheral devices are used for monitoring an operating status of each peripheral device of a main board. The system includes at least one peripheral device, a complex programmable logic device (CPLD), and an output apparatus. The CPLD is electrically connected to the peripheral devices. The CPLD further includes a protocol conversion unit and multiple data registers. The protocol conversion unit converts an operating status of the CPLD or the peripheral devices into device status information. The data register is used for storing the device status information. The output apparatus is electrically connected to the CPLD. The output apparatus is used for displaying the device status information in the data register. A user can observe the operating status of each of the peripheral devices of the main board conveniently.