Patents by Inventor Ya-Jou HSIEH

Ya-Jou HSIEH has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Fabrication methods of integrated semiconductor structure
    Patent number: 9349657
    Abstract: A method for manufacturing the integrated circuit device including, providing a substrate having a first region and a second region. Forming a dielectric layer over the substrate in the first region and the second region. Forming a sacrificial gate layer over the dielectric layer. Patterning the sacrificial gate layer and the dielectric layer to form gate stacks in the first and second regions. Forming an ILD layer within the gate stacks in the first and second regions. Removing the sacrificial gate layer in the first and second regions. Forming a protector over the dielectric layer in the first region; and thereafter removing the dielectric layer in the second region.
    Type: Grant
    Filed: June 17, 2011
    Date of Patent: May 24, 2016
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Sheng-Hsiung Wang, Hsien-Chin Lin, Yuan-Ching Peng, Chia-Pin Lin, Fan-Yi Hsu, Ya-Jou Hsieh
  • FABRICATION METHODS OF INTEGRATED SEMICONDUCTOR STRUCTURE
    Publication number: 20120322246
    Abstract: A method for manufacturing the integrated circuit device including, providing a substrate having a first region and a second region. Forming a dielectric layer over the substrate in the first region and the second region. Forming a sacrificial gate layer over the dielectric layer. Patterning the sacrificial gate layer and the dielectric layer to form gate stacks in the first and second regions. Forming an ILD layer within the gate stacks in the first and second regions. Removing the sacrificial gate layer in the first and second regions. Forming a protector over the dielectric layer in the first region; and thereafter removing the dielectric layer in the second region.
    Type: Application
    Filed: June 17, 2011
    Publication date: December 20, 2012
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Sheng-Hsiung WANG, Hsien-Chin LIN, Yuan-Ching PENG, Chia-Pin LIN, Fan-Yi HSU, Ya-Jou HSIEH