Abstract: A pixel array is provided. The pixel array includes a plurality of pixels, wherein each of the pixels includes a light emitting diode, a first transistor, a second transistor, a third transistor, a fourth transistor, and a fifth transistor. The first transistor receives a first data signal and a first scan signal. The second transistor is coupled to the first transistor and an anode of the light emitting diode. The third transistor receives a system high voltage and a first control signal, and is coupled to the second transistor. The fourth transistor is coupled to an anode of a light emitting diode of an adjacent pixel, a control terminal of the third transistor, and a cathode of the light emitting diode. The fifth transistor is coupled to the cathode of the light emitting diode, and receives a second control signal and a system low voltage.

Abstract: A pixel array is provided. The pixel array includes a plurality of red pixels, a plurality of green pixels, and a plurality of blue pixels. Each green pixel includes a light emitting diode (LED), a first transistor, a second transistor, a third transistor, and a fourth transistor. The LED receives a system low voltage. The first transistor receives a first data signal and a first scan signal. The second transistor is coupled to a second end of the first transistor and the anode of the light emitting diode. The third transistor receives a system high voltage and a first control signal, and is coupled to a first end of the second transistor. The fourth transistor is coupled to the anode of the light-emitting diode of an adjacent green pixel, a control terminal of the third transistor, and the anode of the light-emitting diode.

Abstract: The present disclosure provides a light emitting diode component, including a body and a plurality of P-N diode structures. The P-N diode structures are coupled in series and integrated on the body. The P-N diode structures include a plurality of p-type doping layers and a plurality of n-type doping layers. The p-type doping layer of a first P-N diode structure in the P-N diode structures is electrically coupled to the n-type doping layer of a second P-N diode structure in the P-N diode structures.

Abstract: A pixel array is provided. The pixel array includes a plurality of red pixels, a plurality of green pixels, and a plurality of blue pixels. Each green pixel includes a light emitting diode (LED), a first transistor, a second transistor, a third transistor, and a fourth transistor. The LED receives a system low voltage. The first transistor receives a first data signal and a first scan signal. The second transistor is coupled to a second end of the first transistor and the anode of the light emitting diode. The third transistor receives a system high voltage and a first control signal, and is coupled to a first end of the second transistor. The fourth transistor is coupled to the anode of the light-emitting diode of an adjacent green pixel, a control terminal of the third transistor, and the anode of the light-emitting diode.

Abstract: The present disclosure provides a semiconductor device, including a buffer layer, a first sub-chip and a second sub-chip, and a connecting element. The first sub-chip and the second sub-chip are separately arranged on the buffer layer. Each of the first sub-chip and the second sub-chip includes a first diffusion layer, an active layer, and a second diffusion layer. The first diffusion layer, the active layer, and the second diffusion layer are sequentially arranged on the buffer layer in a top-down approach. The first diffusion layer and the buffer layer are first-type epitaxial layers, and the second diffusion layer is a second-type epitaxial layer. The connecting element is configured to couple the second diffusion layer of the first sub-chip and the first diffusion layer of the second sub-chip.

Abstract: A pixel array is provided. The pixel array includes a plurality of pixels, wherein each of the pixels includes a light emitting diode, a first transistor, a second transistor, a third transistor, a fourth transistor, and a fifth transistor. The first transistor receives a first data signal and a first scan signal. The second transistor is coupled to the first transistor and an anode of the light emitting diode. The third transistor receives a system high voltage and a first control signal, and is coupled to the second transistor. The fourth transistor is coupled to an anode of a light emitting diode of an adjacent pixel, a control terminal of the third transistor, and a cathode of the light emitting diode. The fifth transistor is coupled to the cathode of the light emitting diode, and receives a second control signal and a system low voltage.

Abstract: A pixel circuit includes a light-emitting device, a first transistor, a second transistor, a first capacitor, a third transistor, a fourth transistor, and a fifth transistor. The first transistor and the fourth transistor are controlled by a light-emitting signal. The third transistor and the fifth transistor are controlled by a scan signal. The light-emitting device, the first transistor, the second transistor, the fourth transistor, and the fifth transistor are serially connected between a system high voltage and a system low voltage. The third transistor is coupled between a data signal and a control terminal of the first transistor. The first capacitor is coupled between a control terminal and a downstream terminal of the second transistor. The fifth transistor is coupled between the downstream terminal of the second transistor and a charging reference voltage. A current of the charging reference voltage is less than a current of the system low voltage.

Abstract: A pixel circuit includes a light-emitting device, a first transistor, a second transistor, a first capacitor, a third transistor, a fourth transistor, and a fifth transistor. The first transistor and the fourth transistor are controlled by a light-emitting signal. The third transistor and the fifth transistor are controlled by a scan signal. The light-emitting device, the first transistor, the second transistor, the fourth transistor, and the fifth transistor are serially connected between a system high voltage and a system low voltage. The third transistor is coupled between a data signal and a control terminal of the first transistor. The first capacitor is coupled between a control terminal and a downstream terminal of the second transistor. The fifth transistor is coupled between the downstream terminal of the second transistor and a charging reference voltage. A current of the charging reference voltage is less than a current of the system low voltage.

Abstract: A light emitting diode (LED) display apparatus includes first to third data lines, gate lines, a first color sub-pixel unit and second color sub-pixel units. The gate lines include (N?1)th, Nth and (N+1)th gate lines. The first color sub-pixel unit includes a first color LED electrically coupled to the first data line and the (N?1)th and Nth gate lines. When the (N?1)th or Nth gate line is enabled, the first color LED is turned on. The second color sub-pixel unit is electrically connected to the second data line, and includes a second color LED. The second color sub-pixel units are electrically coupled to the gate lines, respectively. When each gate line is enabled, the corresponding second color LED is turned on. A light emitting area of the first color sub-pixel unit is greater than a light emitting area of each second color sub-pixel unit.

Abstract: A liquid crystal display panel including an array substrate, an opposite substrate disposed opposite to the array substrate and liquid crystal medium between the opposite substrate and the array substrate is provided. The array substrate includes a passivation layer, an insulation layer and a first electrode. The passivation layer has a contact hole. The insulation layer is disposed on the passivation layer and has a concave at a portion overlapped with the contact hole. The first electrode is disposed on the passivation layer and the insulation layer, and has a main portion and stripe portions, wherein a gap is formed between the two adjacent stripe portions. Each stripe portion has a connection portion, at least one turning point and an extending portion. Each connection portion is directly connected to the main portion, and the contact hole is overlapped with at least one connection portion.

Abstract: A liquid crystal display panel including an array substrate, an opposite substrate disposed opposite to the array substrate and liquid crystal medium between the opposite substrate and the array substrate is provided. The array substrate includes a passivation layer, an insulation layer and a first electrode. The passivation layer has a contact hole. The insulation layer is disposed on the passivation layer and has a concave at a portion overlapped with the contact hole. The first electrode is disposed on the passivation layer and the insulation layer, and has a main portion and stripe portions, wherein a gap is formed between the two adjacent stripe portions. Each stripe portion has a connection portion, at least one turning point and an extending portion. Each connection portion is directly connected to the main portion, and the contact hole is overlapped with at least one connection portion.

Abstract: A color filter is provided. The color filter includes a plurality of first color filter patterns, a plurality of second color filter patterns, a plurality of third color filter patterns and an auxiliary light-shielding layer. The auxiliary light-shielding layer is located on boundaries between the first color filter patterns and the second color filter patterns. A light absorption wavelength range of the auxiliary light-shielding layer is the same as that of the first, second, or third color filter patterns.

Abstract: A liquid crystal display panel including an array substrate, an opposite substrate disposed opposite to the array substrate and liquid crystal medium between the opposite substrate and the array substrate is provided. The array substrate includes a passivation layer, an insulation layer and a first electrode. The passivation layer has a contact hole. The insulation layer is disposed on the passivation layer and has a concave at a portion overlapped with the contact hole. The first electrode is disposed on the passivation layer and the insulation layer, and has a main portion and stripe portions, wherein a gap is formed between the two adjacent stripe portions. Each stripe portion has a connection portion, at least one turning point and an extending portion. Each connection portion is directly connected to the main portion, and the contact hole is overlapped with at least one connection portion.