Patents by Inventor Ya LI

Ya LI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240146947
    Abstract: An encoder includes circuitry and memory. The circuitry determines whether a first virtual pipeline decoding unit (VPDU) is split into smaller blocks and whether a second VPDU is split into smaller blocks. In response to a determination the first VPDU is not split into smaller blocks and a determination the second VPDU is split into smaller blocks, a block of chroma samples is predicted without using luma samples. In response to a determination the first VPDU is split into smaller blocks and a determination the second VPDU is split into smaller blocks, the block of chroma samples is predicted using luma samples. In response to a determination the first VPDU is not split into smaller blocks and a determination the second VPDU is not split into smaller block, the block of chroma samples is predicted using luma samples. The block is encoded using the predicted chroma samples.
    Type: Application
    Filed: January 3, 2024
    Publication date: May 2, 2024
    Inventors: Che-Wei KUO, Jing Ya LI, Chong Soon LIM, Han Boon TEO, Hai Wei SUN, Rohith MARS, Tadamasa TOMA, Takahiro NISHI, Kiyofumi ABE, Yusuke KATO
  • Publication number: 20240147023
    Abstract: The present disclosure provides a video generation method and apparatus, a device, and a medium and a product, and relates to the technical field of computers. The method includes: acquiring description information of a target video to be generated; according to the description information of the target video, acquiring, from a video material library, a target clip corresponding to the description information; splicing the target clip with each candidate clip of a plurality of candidate clips in the video material library respectively to obtain a plurality of candidate videos; evaluating a score of each candidate video of the plurality of candidate videos; and generating the target video according to the score of each candidate video of the plurality of candidate videos.
    Type: Application
    Filed: December 21, 2023
    Publication date: May 2, 2024
    Inventors: Wen ZHOU, Fan ZHANG, Ya LI, Chen DU, Rongchang XIE
  • Publication number: 20240124437
    Abstract: The present disclosure relates to an injectable lurasidone suspension and a preparation method thereof, and in particular to an irregular form of a lurasidone solid and a pharmaceutical composition thereof. The present disclosure also relates to a preparation method for the solid and the pharmaceutical composition thereof, and an application thereof in the treatment of mental diseases. According to the present disclosure, the lurasidone solid prepared has controllable particle size and has Dv5O particle size of 6 ?m to 110 ?m. The good particle size stability can also he maintained in the pharmaceutical composition. The lurasidone suspension preparation obtained by the method is fast-acting, has a long sustained release period, and can effectively reduce the risk caused by poor patient compliance.
    Type: Application
    Filed: March 21, 2022
    Publication date: April 18, 2024
    Inventors: Ming LI, Xiangyong LIANG, Zhengxing SU, Dan LI, Duo KE, Cong YI, Wei WEI, Guifu DENG, Ya PENG, Dong ZHAO, Jingyi WANG
  • Publication number: 20240129523
    Abstract: An encoder includes circuitry and memory. Using the memory, the circuitry, in operation, selects an encoding mode from among candidates including a decoder-side motion vector refinement (DMVR) encoding mode and a partition encoding mode. When the DMVR encoding mode is selected, the circuitry: obtains a first motion vector for a first image block; derives a second motion vector from the first motion vector using motion search; and generates a prediction image for the first image block using the second motion vector. When the partition encoding mode is selected, the circuitry: determines a plurality of partitions in a second image block; obtains a third motion vector for each partition; and generates a prediction image for the second image block using the third motion vector, without deriving a fourth motion vector from the third motion vector using motion search.
    Type: Application
    Filed: December 19, 2023
    Publication date: April 18, 2024
    Inventors: Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA, Ryuichi KANOH, Chong Soon LIM, Ru Ling LIAO, Hai Wei SUN, Sughosh Pavan SHASHIDHAR, Han Boon TEO, Jing Ya LI
  • Publication number: 20240121384
    Abstract: An encoder includes circuitry and memory connected to the circuitry. The circuitry: derives an absolute value of a sum of horizontal gradient values; derives, as a first parameter, the total sum of the absolute values of horizontal gradient values; derives, as a second parameter, the total sum of the absolute values of vertical gradient values; derives a horizontal-related pixel difference value; derives, as a third parameter, the total sum of the absolute values of horizontal-related pixel difference values; derives a vertical-related pixel difference value; derives, as a fourth parameter, the total sum of the absolute values of vertical-related pixel difference values; and generates a prediction image using the first to fourth parameters.
    Type: Application
    Filed: December 14, 2023
    Publication date: April 11, 2024
    Inventors: Jing Ya LI, Ru Ling Liao, Chong Soon Lim, Han Boon Teo, Hai Wei Sun, Che Wei Kuo, Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma
  • Patent number: 11956467
    Abstract: An encoder, when sub-block encoding is to be performed, determines a plurality of sub-blocks in a first image block, the plurality of sub-blocks including a first sub-block, determines a first motion vector for the first sub-block by referring to a first candidate list, performs first inter prediction processing on the first sub-block using the first motion vector, and encodes the first image block using a result of the first inter prediction processing. When partition encoding is to be performed, the encoder, in operation, determines a plurality of partitions in a second image block, the plurality of partitions including a first partition, determines a second motion vector for the first partition by referring to a second candidate list, performs second inter prediction processing on the first partition using the second motion vector, and encodes the second image block using a result of the second inter prediction processing.
    Type: Grant
    Filed: September 8, 2021
    Date of Patent: April 9, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh, Chong Soon Lim, Ru Ling Liao, Hai Wei Sun, Sughosh Pavan Shashidhar, Han Boon Teo, Jing Ya Li
  • Publication number: 20240114169
    Abstract: An encoder determines, based on a width and a height of a block, whether or not to disable a prediction mode in which the block is split along a partitioning line defined by a distance and an angle and then prediction is performed; and encodes the block with the prediction mode disabled or not disabled according to a result of the determination on whether or not to disable the prediction mode. Here, the distance is the shortest distance between the center of the block and the partitioning line, and the angle is an angle representing a direction from the center of the block toward the partitioning line in the shortest distance. The encoder determines to disable the prediction mode when (i) a width-to-height ratio is at least 8 or (ii) a height-to-width ratio is at least 8.
    Type: Application
    Filed: December 1, 2023
    Publication date: April 4, 2024
    Inventors: Jing Ya LI, Che Wei KUO, Chong Soon LIM, Chu Tong WANG, Han Boon TEO, Hai Wei SUN, Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA, Yusuke KATO
  • Publication number: 20240114160
    Abstract: An image decoder includes circuitry and a memory, wherein the circuitry, in operation, calculates first values of a first partition in a current block, using a first motion vector for the first partition; calculates second values of a second partition in the current block, using a second motion vector for the second partition; calculates third values of a set of pixels between the first partition and the second partition, using the first motion vector; calculates fourth values of the set of pixels, using the second motion vector; and weights the third values and the fourth values. A number of pixels in a row in the set of pixels is two or more, and two or more weights applied to the third values increase along the row.
    Type: Application
    Filed: December 7, 2023
    Publication date: April 4, 2024
    Inventors: Kiyofumi ABE, Takahiro NISHI, Tadamasa TOMA, Ryuichi KANOH, Chong Soon LIM, Ru Ling LIAO, Hai Wei SUN, Sughosh Pavan SHASHIDHAR, Han Boon TEO, Jing Ya LI
  • Publication number: 20240114134
    Abstract: An encoder includes circuitry and a memory coupled to the circuitry. The circuitry, in operation, determines whether or not a ternary split process of splitting a block into three sub blocks in a first direction parallel to a first longer side of the block is allowed by comparing a size of a second shorter side of the block to a minimum threshold value. The circuitry, responsive to the ternary split process being allowed, writes, into a bitstream, a split direction parameter indicative of a splitting direction. The circuitry, in operation, splits the block into a plurality of sub blocks in a direction indicated by the split direction parameter; and encodes the plurality of sub blocks. The minimum threshold value corresponds to a minimum size supported in a transform process.
    Type: Application
    Filed: December 5, 2023
    Publication date: April 4, 2024
    Inventors: Sughosh Pavan SHASHIDHAR, Hai Wei SUN, Chong Soon LIM, Ru Ling LIAO, Han Boon TEO, Jing Ya LI, Takahiro NISHI, Kiyofumi ABE, Ryuichi KANOH, Tadamasa TOMA
  • Publication number: 20240114129
    Abstract: An encoder includes circuitry and memory coupled to the circuitry. The circuitry, in operation: determines whether a size of a current block, which is a unit for which a vector candidate list including vector candidates is generated, is less than or equal to a threshold; when the size of the current block is less than or equal to the threshold, generates the vector candidate list by registering a history-based motion vector predictor (HMVP) vector candidate in the vector candidate list from an HMVP table without performing a first pruning process; when the size of the current block is greater than the threshold, generates the vector candidate list by performing the first pruning process and registering the HMVP vector candidate in the vector candidate list from the HMVP table; and encodes the current block using the vector candidate list.
    Type: Application
    Filed: December 5, 2023
    Publication date: April 4, 2024
    Inventors: Jing Ya LI, Chong Soon Lim, Han Boon Teo, Che Wei Kuo, Hai Wei Sun, Chu Tong Wang, Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Yusuke Kato
  • Patent number: 11949884
    Abstract: An encoder encodes a video, and includes: circuitry; and memory coupled to the circuitry. Using the memory, the circuitry: obtains at least two items of prediction information for a first partition included in the video; derives at least one template from neighboring samples which neighbor the first partition; calculates at least two costs, using the at least one template and the at least two items of prediction information; using the at least two costs, (i) determines at least one splitting direction for the first partition or (ii) assigns one of the at least two items of prediction information to a second partition split from the first partition according to the splitting direction, and another thereof to a third partition split from the first partition according to the splitting direction; and encodes the first partition according to the splitting direction and the at least two items of prediction information.
    Type: Grant
    Filed: March 7, 2023
    Date of Patent: April 2, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh, Chong Soon Lim, Ru Ling Liao, Hai Wei Sun, Sughosh Pavan Shashidhar, Han Boon Teo, Jing Ya Li
  • Patent number: 11947372
    Abstract: A device includes a voltage regulator circuit configured to pull up a voltage at an output terminal to equal to half of a supply voltage; multiple first transistors coupled between the output terminal and a voltage terminal providing the supply voltage; and a control circuit configured to pull down gate voltages of the first transistors from the supply voltage to a voltage level between the supply voltage and a ground voltage at a first time. The first transistors are configured to pull up the voltage at the output terminal to the supply voltage at a second time.
    Type: Grant
    Filed: January 18, 2023
    Date of Patent: April 2, 2024
    Assignees: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., TSMC CHINA COMPANY LIMITED
    Inventors: Yong-Liang Jin, Ya-Qi Ma, Wei Li, Di Fan
  • Patent number: 11941210
    Abstract: A detection circuit is provided herein, which includes a first transistor, a second transistor, a third transistor, a light sensor, a capacitor, and a fourth transistor. The first transistor has a control terminal, a first terminal, and a second terminal. The second transistor is coupled to the control terminal. The third transistor is coupled to the control terminal and the second terminal. The light sensor is coupled to the control terminal. The capacitor is coupled to the control terminal. The fourth transistor is coupled to the second terminal.
    Type: Grant
    Filed: November 21, 2022
    Date of Patent: March 26, 2024
    Assignee: INNOLUX CORPORATION
    Inventors: Ya-Li Tsai, Hui-Ching Yang, Yang-Jui Huang, Te-Yu Lee
  • Publication number: 20240089493
    Abstract: An encoder includes circuitry and memory connected to the circuitry. In operation, the circuitry: corrects a base motion vector using a correction value for correcting the base motion vector in a predetermined direction; and encodes a current partition to be encoded in an image of a video, using the base motion vector corrected. The correction value is specified by a first parameter and a second parameter, the first parameter indicating a table to be selected from among a plurality of tables each including values, the second parameter indicating one of the values included in the table to be selected indicated by the first parameter. In each of the plurality of tables, a smaller value among the values is assigned a smaller index. Each of the plurality of tables includes a different minimum value among the values.
    Type: Application
    Filed: November 20, 2023
    Publication date: March 14, 2024
    Inventors: Jing Ya LI, Chong Soon LIM, Ru Ling LIAO, Hai Wei SUN, Han Boon TEO, Kiyofumi ABE, Tadamasa TOMA, Takahiro NISHI
  • Patent number: 11930206
    Abstract: An encoder which includes circuitry and memory. Using the memory, the circuitry generates a list which includes candidates for a first motion vector for a first partition. The list has a maximum list size and an order of the candidates, and at least one of the maximum list size or the order of the candidates is dependent on at least one of a partition size or a partition shape of the first partition. The circuitry selects the first motion vector from the candidates included in the list; encodes an index indicating the first motion vector among the candidates in the list into the bitstream based on the maximum list size; and generates the predicted image for the first partition using the first motion vector.
    Type: Grant
    Filed: April 19, 2023
    Date of Patent: March 12, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Chong Soon Lim, Hai Wei Sun, Sughosh Pavan Shashidhar, Han Boon Teo, Ru Ling Liao, Jing Ya Li, Tadamasa Toma, Takahiro Nishi, Kiyofumi Abe, Ryuichi Kanoh
  • Patent number: 11924456
    Abstract: An encoder includes circuitry and a memory coupled to the circuitry, wherein the circuitry, in operation, performs a partition process. The partition process includes calculating first values of a set of pixels between a first partition and a second partition in a current block, using a first motion vector for the first partition; calculating second values of the set of pixels, using a second motion vector for the second partition; and calculating third values of the set of pixels by weighting the first values and the second values. When a ratio of a width to a height of the current block is larger than 4 or a ratio of the height to the width of the current block is larger than 4, the circuitry disables the partition process.
    Type: Grant
    Filed: December 15, 2022
    Date of Patent: March 5, 2024
    Assignee: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh, Chong Soon Lim, Ru Ling Liao, Hai Wei Sun, Sughosh Pavan Shashidhar, Han Boon Teo, Jing Ya Li
  • Patent number: 11924423
    Abstract: Provided is an encoder which includes circuitry and memory. Using the memory, the circuitry splits an image block into a plurality of partitions, obtains a prediction image for a partition, and encodes the image block using the prediction image. When the partition is not a non-rectangular partition, the circuitry obtains (i) a first prediction image for the partition, (ii) a gradient image for the first prediction image, and (iii) a second prediction image as the prediction image using the first prediction image and the gradient image. When the partition is a non-rectangular partition, the circuitry obtains the first prediction image as the prediction image without using the gradient image.
    Type: Grant
    Filed: April 22, 2022
    Date of Patent: March 5, 2024
    Assignee: Panasonic Intellectual Property Corporation of America
    Inventors: Kiyofumi Abe, Takahiro Nishi, Tadamasa Toma, Ryuichi Kanoh, Chong Soon Lim, Ru Ling Liao, Hai Wei Sun, Sughosh Pavan Shashidhar, Han Boon Teo, Jing Ya Li
  • Publication number: 20240071872
    Abstract: A via-filling method of a TGV substrate includes steps: filling a plurality of metal balls into a plurality of vias of the TGV substrate; using a heating process to melt the plurality of metal balls to form a liquid-state metal; and cooling down the liquid-state metal to form a solid-state metal inside the plurality of vias. Because the method needn't use solvents or fluxes, the solid-state metal inside the plurality of vias have better electric conductivity.
    Type: Application
    Filed: February 7, 2023
    Publication date: February 29, 2024
    Applicant: Ingentec Corporation
    Inventors: Hsiao Lu Chen, AI SEN LIU, HSIANG AN FENG, YA LI CHEN
  • Publication number: 20240072033
    Abstract: A bonding and transferring method for die package structures is provided, including providing a die package structure which has a positioning adhesive disposed thereon, and providing a vibration base having at least one cavity corresponding to the positioning adhesive. By alignment of the positioning adhesive and the cavity, the die package structure can be positioned into the vibration base. A target substrate is further provided and bonded with the vibration base having the die package structure disposed thereon through a metal material. And a laser process is then performed to melt the metal material. At last, the vibration base and the positioning adhesive are removed so the die package structure is successfully bonded and transferred onto the target substrate. By employing the proposed process method of the present invention, rapid mass transfer result is accomplished, and the packaging yield of vertical light emitting diode die package structures is optimized.
    Type: Application
    Filed: February 7, 2023
    Publication date: February 29, 2024
    Applicant: Ingentec Corporation
    Inventors: Hsiao Lu Chen, AI SEN LIU, HSIANG AN FENG, YA LI CHEN
  • Publication number: 20240069878
    Abstract: Aspects of the present disclosure provide a method for training a predictor that predicts performance of a plurality of machine learning (ML) models on platforms. For example, the method can include converting each of the ML models into a plurality of instructions or the instructions and a plurality of intermediate representations (IRs). The method can also include simulating execution of the instructions corresponding to each of the ML models on a platform and generating instruction performance reports. Each of the instruction performance reports can be associated with performance of the instructions corresponding to one of the ML models that are executed on the platform. The method can also include training the predictor with the instructions or the IRs as learning features and the instruction performance reports as learning labels, compiling the predictor into a library file, and storing the library file in a storage device.
    Type: Application
    Filed: July 3, 2023
    Publication date: February 29, 2024
    Applicant: MEDIATEK INC.
    Inventors: Huai-Ting LI, I-Lin CHEN, Tsai JEN CHIEH, Cheng-Sheng CHAN, ShengJe HUNG, Yi-Min TSAI, Huang YA-LIN