Patents by Inventor Ya-Ru Yang
Ya-Ru Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10312235Abstract: A fin shaped structure and a method of forming the same. The method includes providing a substrate having a first fin structure and a second fin structure. Next, an insulation material layer is formed on the substrate. Then, a portion of the first fin structure is removed, to form a first recess. Following this, a first buffer layer and a first channel layer are formed sequentially in the first recess. Next, a portion of the second fin structure is removed, to form a second recess. Then, a second buffer layer and a second channel layer are formed in the second recess sequentially, wherein the second buffer layer is different from the first buffer layer.Type: GrantFiled: February 8, 2018Date of Patent: June 4, 2019Assignee: UNITED MICROELECTRONICS CORP.Inventors: Wen-Yin Weng, Cheng-Tung Huang, Wei-Heng Hsu, Yu-Ming Lin, Ya-Ru Yang
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Patent number: 10283497Abstract: The present invention provides a light-emitting diode (LED) chip. The LED chip includes a LED structure and an electrostatic discharge (ESD) protection structure. The ESD protection structure is in a corner of the LED chip and connects with the LED structure in anti-parallel. An interface between the LED structure and the ESD protection structure is a straight line from a top view.Type: GrantFiled: November 27, 2016Date of Patent: May 7, 2019Assignee: LEXTAR ELECTRONICS CORPORATIONInventors: Shiou-Yi Kuo, Chao-Hsien Lin, Ya-Ru Yang
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Patent number: 10043950Abstract: A semiconductor light-emitting structure and a semiconductor package structure thereof are provided. The semiconductor light-emitting structure includes a first-type semiconductor layer, an active layer, a second-type semiconductor layer, a metal layer and a distributed Bragg reflector. The active layer is disposed on the first-type semiconductor layer. The second-type semiconductor layer is disposed on the active layer. The metal layer is disposed on the second-type semiconductor layer as a first reflective structure, wherein the metal layer has an opening portion. The distributed Bragg reflector is disposed on the metal layer and interposed into the opening portion as a second reflective structure. The first reflective structure and the second reflective structure form a reflective surface on the second-type semiconductor layer.Type: GrantFiled: October 14, 2016Date of Patent: August 7, 2018Assignee: LEXTAR ELECTRONICS CORPORATIONInventors: Shiou-Yi Kuo, Chao-Hsien Lin, Ya-Ru Yang
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Publication number: 20180166444Abstract: A fin shaped structure and a method of forming the same. The method includes providing a substrate having a first fin structure and a second fin structure. Next, an insulation material layer is formed on the substrate. Then, a portion of the first fin structure is removed, to form a first recess. Following this, a first buffer layer and a first channel layer are formed sequentially in the first recess. Next, a portion of the second fin structure is removed, to form a second recess. Then, a second buffer layer and a second channel layer are formed in the second recess sequentially, wherein the second buffer layer is different from the first buffer layer.Type: ApplicationFiled: February 8, 2018Publication date: June 14, 2018Inventors: Wen-Yin Weng, Cheng-Tung Huang, Wei-Heng Hsu, Yu-Ming Lin, Ya-Ru Yang
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Patent number: 9929154Abstract: A fin shaped structure and a method of forming the same. The method includes providing a substrate having a first fin structure and a second fin structure. Next, an insulation material layer is formed on the substrate. Then, a portion of the first fin structure is removed, to form a first recess. Following this, a first buffer layer and a first channel layer are formed sequentially in the first recess. Next, a portion of the second fin structure is removed, to form a second recess. Then, a second buffer layer and a second channel layer are formed in the second recess sequentially, wherein the second buffer layer is different from the first buffer layer.Type: GrantFiled: November 13, 2014Date of Patent: March 27, 2018Assignee: UNITED MICROELECTRONICS CORP.Inventors: Wen-Yin Weng, Cheng-Tung Huang, Wei-Heng Hsu, Yu-Ming Lin, Ya-Ru Yang
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Patent number: 9793296Abstract: A method for fabricating substrate of a semiconductor device includes the steps of: providing a first silicon layer; forming a dielectric layer on the first silicon layer; bonding a second silicon layer to the dielectric layer; removing part of the second silicon layer and part of the dielectric layer to define a first region and a second region on the first silicon layer, wherein the remaining of the second silicon layer and the dielectric layer are on the second region; and forming an epitaxial layer on the first region of the first silicon layer, wherein the epitaxial layer and the second silicon layer comprise same crystalline orientation.Type: GrantFiled: October 17, 2016Date of Patent: October 17, 2017Assignee: UNITED MICROELECTRONICS CORP.Inventors: Wen-Yin Weng, Cheng-Tung Huang, Ya-Ru Yang, Yi-Ting Wu, Yu-Ming Lin, Jen-Yu Wang
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Publication number: 20170194313Abstract: The present invention provides a light-emitting diode (LED) chip. The LED chip includes a LED structure and an electrostatic discharge (ESD) protection structure. The ESD protection structure is in a corner of the LED chip and connects with the LED structure in anti-parallel. An interface between the LED structure and the ESD protection structure is a straight line from a top view.Type: ApplicationFiled: November 27, 2016Publication date: July 6, 2017Inventors: Shiou-Yi KUO, Chao-Hsien LIN, Ya-Ru YANG
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Publication number: 20170155018Abstract: A semiconductor light-emitting structure and a semiconductor package structure thereof are provided. The semiconductor light-emitting structure includes a first-type semiconductor layer, an active layer, a second-type semiconductor layer, a metal layer and a distributed Bragg reflector. The active layer is disposed on the first-type semiconductor layer. The second-type semiconductor layer is disposed on the active layer. The metal layer is disposed on the second-type semiconductor layer as a first reflective structure, wherein the metal layer has an opening portion. The distributed Bragg reflector is disposed on the metal layer and interposed into the opening portion as a second reflective structure. The first reflective structure and the second reflective structure form a reflective surface on the second-type semiconductor layer.Type: ApplicationFiled: October 14, 2016Publication date: June 1, 2017Inventors: Shiou-Yi Kuo, Chao-Hsien Lin, Ya-Ru Yang
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Publication number: 20170040346Abstract: A method for fabricating substrate of a semiconductor device includes the steps of: providing a first silicon layer; forming a dielectric layer on the first silicon layer; bonding a second silicon layer to the dielectric layer; removing part of the second silicon layer and part of the dielectric layer to define a first region and a second region on the first silicon layer, wherein the remaining of the second silicon layer and the dielectric layer are on the second region; and forming an epitaxial layer on the first region of the first silicon layer, wherein the epitaxial layer and the second silicon layer comprise same crystalline orientation.Type: ApplicationFiled: October 17, 2016Publication date: February 9, 2017Inventors: Wen-Yin Weng, Cheng-Tung Huang, Ya-Ru Yang, Yi-Ting Wu, Yu-Ming Lin, Jen-Yu Wang
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Patent number: 9508799Abstract: A method for fabricating substrate of a semiconductor device is disclosed. The method includes the steps of: providing a first silicon layer; forming a dielectric layer on the first silicon layer; bonding a second silicon layer to the dielectric layer; removing part of the second silicon layer and part of the dielectric layer to define a first region and a second region on the first silicon layer, wherein the remaining of the second silicon layer and the dielectric layer are on the second region; and forming an epitaxial layer on the first region of the first silicon layer, wherein the epitaxial layer and the second silicon layer comprise same crystalline orientation.Type: GrantFiled: August 26, 2014Date of Patent: November 29, 2016Assignee: UNITED MICROELECTRONICS CORP.Inventors: Wen-Yin Weng, Cheng-Tung Huang, Ya-Ru Yang, Yi-Ting Wu, Yu-Ming Lin, Jen-Yu Wang
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Publication number: 20160141288Abstract: A fin shaped structure and a method of forming the same. The method includes providing a substrate having a first fin structure and a second fin structure. Next, an insulation material layer is formed on the substrate. Then, a portion of the first fin structure is removed, to form a first recess. Following this, a first buffer layer and a first channel layer are formed sequentially in the first recess. Next, a portion of the second fin structure is removed, to form a second recess. Then, a second buffer layer and a second channel layer are formed in the second recess sequentially, wherein the second buffer layer is different from the first buffer layer.Type: ApplicationFiled: November 13, 2014Publication date: May 19, 2016Inventors: Wen-Yin Weng, Cheng-Tung Huang, Wei-Heng Hsu, Yu-Ming Lin, Ya-Ru Yang
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Publication number: 20160064485Abstract: A method for fabricating substrate of a semiconductor device is disclosed. The method includes the steps of: providing a first silicon layer; forming a dielectric layer on the first silicon layer; bonding a second silicon layer to the dielectric layer; removing part of the second silicon layer and part of the dielectric layer to define a first region and a second region on the first silicon layer, wherein the remaining of the second silicon layer and the dielectric layer are on the second region; and forming an epitaxial layer on the first region of the first silicon layer, wherein the epitaxial layer and the second silicon layer comprise same crystalline orientation.Type: ApplicationFiled: August 26, 2014Publication date: March 3, 2016Inventors: Wen-Yin Weng, Cheng-Tung Huang, Ya-Ru Yang, Yi-Ting Wu, Yu-Ming Lin, Jen-Yu Wang
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Patent number: 8733115Abstract: A method for controlling freezing capacity of a variable-frequency freezing AC ice-water system separates the freezing capacity of each individual requirement end so as to reduce sudden or peak concentrating freezing demand and relieve variable-frequency load demand, and defines operating procedures corresponding to different requirement ends, respectively, wherein each of the operating procedures has a corresponding high-low temperature range that can be used as a temperature buffer zone so as to redistribute supply of the freezing capacity to each requirement end, thereby allowing the compressors thereof to operate smoothly and thus achieve energy saving as a result. The drawbacks of damaged pipelines are overcome that cause deficiency in freezing capacity as encountered in prior techniques.Type: GrantFiled: October 28, 2010Date of Patent: May 27, 2014Assignee: Chunghwa Telecom Co., Ltd.Inventors: Shyang-Yih Chen, Yu-Huan Wang, Chen-Kun Hsu, Ming-Hsien Pan, Pin-Chuan Chen, Ya-Ru Yang, Yan-Shao Lin
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Patent number: 8528347Abstract: A method for controlling the freezing capacity of a fixed-frequency freezing AC ice-water system, by using temperature buffer difference of individual requirement ends to control the number of operating compressors in a fixed-frequency chiller and make each of the operating compressors have a usage rate close to 100%. Further, various operating procedures are defined for the requirement ends and each of the operating procedures has an individually defined high-low temperature range such that the freezing capacity supply cycle or startup cycle of the fixed-frequency chiller can be adjusted by using the high-low temperature ranges of the operating procedures as temperature buffer strips, thereby allowing the compressors in the fixed-frequency chiller to operate collectively in order to save energy.Type: GrantFiled: October 14, 2010Date of Patent: September 10, 2013Assignee: Chunghwa Telecom Co., Ltd.Inventors: Shyang-Yih Chen, Yu-Huan Wang, Chen-Kun Hsu, Ming-Hsien Pan, Pin-Chuan Chen, Ya-Ru Yang, Yan-Shao Lin
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Publication number: 20120000215Abstract: A method for controlling freezing capacity of a variable-frequency freezing AC ice-water system separates the freezing capacity of each individual requirement end so as to reduce sudden or peak concentrating freezing demand and relieve variable-frequency load demand, and defines operating procedures corresponding to different requirement ends, respectively, wherein each of the operating procedures has a corresponding high-low temperature range that can be used as a temperature buffer zone so as to redistribute supply of the freezing capacity to each requirement end, thereby allowing the compressors thereof to operate smoothly and thus achieve energy saving as a result. The drawbacks of damaged pipelines are overcome that cause deficiency in freezing capacity as encountered in prior techniques.Type: ApplicationFiled: October 28, 2010Publication date: January 5, 2012Applicant: CHUNGHWA TELECOM CO., LTD.Inventors: Shyang-Yih Chen, Yu-Huan Wang, Chen-Kun Hsu, Ming-Hsien Pan, Pin-Chuan Chen, Ya-Ru Yang, Yan-Shao Lin
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Publication number: 20120000214Abstract: A method for controlling the freezing capacity of a fixed-frequency freezing AC ice-water system, by using temperature buffer difference of individual requirement ends to control the number of operating compressors in a fixed-frequency chiller and make each of the operating compressors have a usage rate close to 100%. Further, various operating procedures are defined for the requirement ends and each of the operating procedures has an individually defined high-low temperature range such that the freezing capacity supply cycle or startup cycle of the fixed-frequency chiller can be adjusted by using the high-low temperature ranges of the operating procedures as temperature buffer strips, thereby allowing the compressors in the fixed-frequency chiller to operate collectively in order to save energy.Type: ApplicationFiled: October 14, 2010Publication date: January 5, 2012Applicant: CHUNGHWA TELECOM CO., LTD.Inventors: Shyang-Yih Chen, Yu-Huan Wang, Chen-Kun Hsu, Ming-Hsien Pan, Pin-Chuan Chen, Ya-Ru Yang, Yan-Shao Lin