Patents by Inventor Ya-Ting Chen

Ya-Ting Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240147405
    Abstract: A controlling method for a wireless communication device is provided. The controlling method for the wireless communication device includes: attaching a first Universal Subscriber Identity Module (USIM) to a Long-Term Evolution (LTE) network; determining whether a second USIM is camped on the LTE network; detecting whether a paging collision is happened, if the second USIM is camped on the LTE network; generating a requested International Mobile Subscriber Identity (IMSI) offset for the second USIM, if the paging collision is happened, wherein the requested IMSI offset is 1 or min(T, nB)?1, T is a default paging period and nB is a number of paging occurrences within the default paging period; transmitting an attach request with the requested IMSI offset to the LTE network for the second USIM; receiving a negotiated IMSI offset from the LTE network; and attaching the second USIM to the LTE network with the negotiated IMSI offset.
    Type: Application
    Filed: November 1, 2023
    Publication date: May 2, 2024
    Inventors: Kuan-Yu LIN, Ya-ling Hsu, Wan-Ting Huang, Yi-Han CHUNG, Yi-Cheng CHEN
  • Publication number: 20240136117
    Abstract: A multi-phase coupled inductor includes a first iron core, a second iron core, and a plurality of coil windings. The first iron core includes a first body and a plurality of first core posts. The plurality of first core posts are connected to the first body. The second iron core is opposite to the first iron core. The second iron core and the first body are spaced apart from each other by a gap. The plurality of coil windings wrap around the plurality of first core posts, respectively. Each of the coil windings has at least two coils.
    Type: Application
    Filed: October 1, 2023
    Publication date: April 25, 2024
    Inventors: HUNG-CHIH LIANG, PIN-YU CHEN, HANG-CHUN LU, YA-WEN YANG, YU-TING HSU, WEI-ZHI HUANG
  • Publication number: 20240126694
    Abstract: An out-of-order buffer includes an out-of-order queue and a controlling circuit. The out-of-order queue includes a request sequence table and a request storage device. The controlling circuit receives and temporarily stores the plural requests into the out-of-order queue. After the plural requests are transmitted to plural corresponding target devices, the controlling circuit retires the plural requests. The request sequence table contains m×n indicating units. The request sequence table contains m entry indicating rows. Each of the m entry indicating rows contains n indicating units. The request storage device includes m storage units corresponding to the m entry indicating rows in the request sequence table. The state of indicating whether one request is stored in the corresponding storage unit of the m storage units is recoded in the request sequence table. The storage sequence of the plural requests is recoded in the request sequence table.
    Type: Application
    Filed: November 18, 2022
    Publication date: April 18, 2024
    Inventors: Jyun-Yan LI, Po-Hsiang HUANG, Ya-Ting CHEN, Yao-An TSAI, Shu-Wei YI
  • Patent number: 11943935
    Abstract: A layout pattern of a magnetoresistive random access memory (MRAM) includes a substrate having a first cell region, a second cell region, a third cell region, and a fourth cell region and a diffusion region on the substrate extending through the first cell region, the second cell region, the third cell region, and the fourth cell region. Preferably, the diffusion region includes a H-shape according to a top view.
    Type: Grant
    Filed: September 26, 2022
    Date of Patent: March 26, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Yen Tseng, Shu-Ru Wang, Yu-Tse Kuo, Chang-Hung Chen, Yi-Ting Wu, Shu-Wei Yeh, Ya-Lan Chiou, Chun-Hsien Huang
  • Publication number: 20240095177
    Abstract: A computing system performs partial cache deactivation. The computing system estimates the leakage power of a cache based on operating conditions of the cache including voltage and temperature. The computing system further identifies a region of the cache as a candidate for deactivation based on cache hit counts. The computing system then adjusts the size of the region for the deactivation based on the leakage power and a bandwidth of a memory hierarchy device. The memory hierarchy device is at the next level to the cache in a memory hierarchy of the computing system.
    Type: Application
    Filed: August 17, 2023
    Publication date: March 21, 2024
    Inventors: Yu-Pin Chen, Jia-Ming Chen, Chien-Yuan Lai, Ya Ting Chang, Cheng-Tse Chen
  • Publication number: 20240095168
    Abstract: A computing system performs shared cache allocation to allocate cache resources to groups of tasks. The computing system monitors the bandwidth at a memory hierarchy device that is at a next level to the cache in a memory hierarchy of the computing system. The computing system estimates a change in dynamic power from a corresponding change in the bandwidth before and after the cache resources are allocated. The allocation of the cache resources are adjusted according to an allocation policy that receives inputs including the estimated change in the dynamic power and a performance indication of task execution.
    Type: Application
    Filed: August 17, 2023
    Publication date: March 21, 2024
    Inventors: Yu-Pin Chen, Jia-Ming Chen, Chien-Yuan Lai, Ya Ting Chang, Cheng-Tse Chen
  • Publication number: 20240071535
    Abstract: Provided is an anti-fuse memory including a anti-fuse memory cell including an isolation structure, a select gate, first and second gate insulating layers, an anti-fuse gate, and first, second and third doped regions. The isolation structure is disposed in a substrate. The select gate is disposed on the substrate. The first gate insulating layer is disposed between the select gate and the substrate. The anti-fuse gate is disposed on the substrate and partially overlapped with the isolation structure. The second gate insulating layer is disposed between the anti-fuse gate and the substrate. The first doped region and the second doped region are disposed in the substrate at opposite sides of the select gate, respectively, wherein the first doped region is located between the select gate and the anti-fuse gate. The third doped region is disposed in the substrate and located between the first doped region and the isolation structure.
    Type: Application
    Filed: October 16, 2022
    Publication date: February 29, 2024
    Applicant: United Microelectronics Corp.
    Inventors: Chung-Hao Chen, Chi-Hsiu Hsu, Chi-Fa Lien, Ying-Ting Lin, Cheng-Hsiao Lai, Ya-Nan Mou
  • Patent number: 11914818
    Abstract: An electrical device and an operation control method are provided. The electronic device includes a touch module and a processor. The touch module includes a touchable region. The touchable region is divided into at least a first touchable region and a second touchable region. The first touchable region is configured to implement a first function. The second touchable region is configured to implement the first function and a second function. The processor is electrically connected to the touch module. When at least one first touch point is detected in the first touchable region, at least one second touch point is detected in the second touchable region, and the processor determines that a distance between the first touch point and the second touch point is within a predetermined distance, the second touchable region is switched to implementing the first function.
    Type: Grant
    Filed: June 21, 2022
    Date of Patent: February 27, 2024
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Yao-Yu Tsai, Chun-Tsai Yeh, Ya-Ting Chen
  • Publication number: 20240004492
    Abstract: An electronic device includes a touch device, a display device, and a processor. The processor includes a built-in operating system with a user mode and a kernel mode. The user mode includes a touch application module, a control interface module, and an image application module. The kernel mode includes a main driver module and a secondary driver module. The secondary driver module performs preliminary behavior analysis processing on a sensing signal, and then transmits the sensing signal to the touch application module, to obtain corresponding touch data and transmit the touch data to the control interface module. The control interface module generates a display instruction according to the touch data. The image application module generates image data according to the display instruction. The main driver module receives and processes the image data to generate a display image, to directly transmit the display image to the display device.
    Type: Application
    Filed: March 8, 2023
    Publication date: January 4, 2024
    Inventors: Yao-Yu TSAI, Chien-Chih TSENG, Chun-Tsai YEH, Ya-Ting CHEN
  • Patent number: 11825067
    Abstract: A naked-eye stereoscopic display system including a display, an optical element, and a controller is provided. The display is adapted to emit a plurality of image beams, and includes a plurality of display regions. Each of the display regions includes a plurality of first sub-display regions and a second sub-display region. A light configuration is performed on the image beams by the optical element, and then the image beams are projected out of the naked-eye stereoscopic display. The controller is electrically connected with the display. The controller controls the display, so that a light intensity of an image beam generated by the first sub-display regions is lower than a light intensity of an image beam generated by the second sub-display region. A display method of the naked-eye stereoscopic display is also provided.
    Type: Grant
    Filed: June 1, 2022
    Date of Patent: November 21, 2023
    Assignee: Au Optronics Corporation
    Inventor: Ya-Ting Chen
  • Patent number: 11789558
    Abstract: A display device includes a substrate, touch antenna units and switch circuits. The touch antenna units are arrayed above the substrate, wherein each touch antenna unit includes a first loop electrode. The first loop electrode is completely located in a display area of the display device, and has a first end and a second end. Each of the switch circuits is electrically connected to the first end and the second end of the first loop electrode in a corresponding touch antenna unit.
    Type: Grant
    Filed: November 28, 2022
    Date of Patent: October 17, 2023
    Assignee: AUO Corporation
    Inventors: Ya-Ting Chen, Sheng-Wen Cheng
  • Publication number: 20230308624
    Abstract: A stereoscopic display system and method are provided. The system calculates a viewing angle of a user corresponding to a display panel. The system calculates a first display pixel area arrangement and a second display pixel area arrangement of a parallax filter corresponding to the display panel. The system determines a first display pixel area, a second display pixel area, and a no-value pixel area corresponding to the display panel based on the first display pixel area arrangement and the second display pixel area arrangement. The system analyzes the first display pixel area and the second display pixel area adjacent to the no-value pixel area to generate a compensation value corresponding to each of the pixels in the no-value pixel area.
    Type: Application
    Filed: November 4, 2022
    Publication date: September 28, 2023
    Inventors: Ya-Ting CHEN, Sheng-Wen CHENG
  • Patent number: 11749699
    Abstract: A method of fabricating a solid-state image sensor, including steps of forming a second type doped semiconductor layer and a semiconductor material layer sequentially on a first type doped semiconductor substrate to constitute a photoelectric conversion portion, forming a multilayer structure on the semiconductor material layer, wherein a refractive index of the multilayer structure gradually decreases from a bottom layer to a top layer of the multilayer structure and is smaller than a refractive index of the semiconductor material layer, and performing a photolithography process to the multiplayer structure and the photoelectric conversion portion to form multiple micro pillars, wherein the micro pillars protrude from the semiconductor material layer and are isolated by recesses extending into the photoelectric conversion portion.
    Type: Grant
    Filed: July 10, 2022
    Date of Patent: September 5, 2023
    Assignee: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Shih-Ping Lee, Yi-Ping Lin, Yu-Ching Liao, Ya-Ting Chen, Hsin-Ying Tung
  • Publication number: 20230262206
    Abstract: A naked-eye stereoscopic display system including a display, an optical element, and a controller is provided. The display is adapted to emit a plurality of image beams, and includes a plurality of display regions. Each of the display regions includes a plurality of first sub-display regions and a second sub-display region. A light configuration is performed on the image beams by the optical element, and then the image beams are projected out of the naked-eye stereoscopic display. The controller is electrically connected with the display. The controller controls the display, so that a light intensity of an image beam generated by the first sub-display regions is lower than a light intensity of an image beam generated by the second sub-display region. A display method of the naked-eye stereoscopic display is also provided.
    Type: Application
    Filed: June 1, 2022
    Publication date: August 17, 2023
    Applicant: Au Optronics Corporation
    Inventor: Ya-Ting Chen
  • Patent number: 11620015
    Abstract: The disclosure provides an electronic device, including a display panel, a touch component, and a processor. The display panel includes a display region, the touch component includes a touch region, and the processor is electrically connected to the display panel and the touch component. The processor defines an effective input region for executing a function of at least one input component in the touch region, to establish link setting information between the input component and the corresponding effective input region, and execute the function of the input component according to the link setting information in response to a touch operation sensed by the effective input region.
    Type: Grant
    Filed: January 12, 2022
    Date of Patent: April 4, 2023
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Ya-Ting Chen, Chien-Chih Tseng, Yao-Yu Tsai
  • Publication number: 20230011325
    Abstract: An electrical device and an operation control method are provided. The electronic device includes a touch module and a processor. The touch module includes a touchable region. The touchable region is divided into at least a first touchable region and a second touchable region. The first touchable region is configured to implement a first function. The second touchable region is configured to implement the first function and a second function. The processor is electrically connected to the touch module. When at least one first touch point is detected in the first touchable region, at least one second touch point is detected in the second touchable region, and the processor determines that a distance between the first touch point and the second touch point is within a predetermined distance, the second touchable region is switched to implementing the first function.
    Type: Application
    Filed: June 21, 2022
    Publication date: January 12, 2023
    Inventors: Yao-Yu Tsai, Chun-Tsai Yeh, Ya-Ting Chen
  • Publication number: 20220344398
    Abstract: A method of fabricating a solid-state image sensor, including steps of forming a second type doped semiconductor layer and a semiconductor material layer sequentially on a first type doped semiconductor substrate to constitute a photoelectric conversion portion, forming a multilayer structure on the semiconductor material layer, wherein a refractive index of the multilayer structure gradually decreases from a bottom layer to a top layer of the multilayer structure and is smaller than a refractive index of the semiconductor material layer, and performing a photolithography process to the multiplayer structure and the photoelectric conversion portion to form multiple micro pillars, wherein the micro pillars protrude from the semiconductor material layer and are isolated by recesses extending into the photoelectric conversion portion.
    Type: Application
    Filed: July 10, 2022
    Publication date: October 27, 2022
    Applicant: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Shih-Ping Lee, Yi-Ping Lin, Yu-Ching Liao, Ya-Ting Chen, Hsin-Ying Tung
  • Patent number: 11455046
    Abstract: An electronic device suitable for a stylus is provided. The electronic device includes a display panel, a touch module, and a processor. The display panel includes a display area. The touch module includes a touchable area. The processor is electrically connected to the display panel and the touch module. The processor defines an effective input area in the touchable area in response to the operation of the stylus, defines a mapping display area in the display area corresponding to the effective input area, and adjusts the display ratio of the mapping display area according to the input ratio of the effective input area.
    Type: Grant
    Filed: May 6, 2021
    Date of Patent: September 27, 2022
    Assignee: ASUSTEK COMPUTER INC.
    Inventors: Ya-Ting Chen, Hung-Yi Lin, Chien-Chih Tseng, Chun-Tsai Yeh, Wei-Tong Lin, Ming-Chieh Chen, Yi-Ou Wang, Chao-Chieh Cheng
  • Publication number: 20220300106
    Abstract: The disclosure provides an electronic device adapted to communicate with a stylus. The electronic device includes a display panel, a touch module, and a processor. The display panel has a display area, the touch module has a touchable area, and the processor is electrically connected to the display panel and the touch module. The processor is configured to: define at least one effective input area in response to an operation of the stylus in the touchable area, and when the touch module detects that the stylus is approaching the effective input area, switch the effective input area to a stylus mode, and display a range marking pattern in the effective input area.
    Type: Application
    Filed: March 8, 2022
    Publication date: September 22, 2022
    Inventors: Chao-Chieh Cheng, Yi-Ou Wang, Ya-Ting Chen, Chun-Tsai Yeh
  • Patent number: 11424280
    Abstract: A solid-state image sensor with pixels each including a photoelectric conversion portion made of a second type doped semiconductor layer and a semiconductor material layer, and the second type doped semiconductor layer contacts a first type doped semiconductor substrate. An anti-reflective portion is provided with multiple micro pillars on the semiconductor material layer, wherein micro pillars are isolated by recesses extending into the photoelectric conversion portion, and the refractive index of the micro pillar gradually decreases from bottom to top and is smaller than the refractive index of the light-receiving portion of the semiconductor material layer.
    Type: Grant
    Filed: April 9, 2020
    Date of Patent: August 23, 2022
    Assignee: Powerchip Semiconductor Manufacturing Corporation
    Inventors: Shih-Ping Lee, Yi-Ping Lin, Yu-Ching Liao, Ya-Ting Chen, Hsin-Ying Tung