Patents by Inventor Ya-Wen Lee
Ya-Wen Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20150042628Abstract: A gate driver is used to drive scan lines, a first scan line to a mth scan line. The m is a positive integer. The gate driver comprises driver units, a first driver unit to a mth driver unit, coupled with the first scan line to the mth scan line respectively. The driver units generate scan signals, a first scan signal to a mth scan signal, to drive the first scan line to the mth scan line respectively. The first driver unit, the second driver unit, the (m?1)th driver unit and the mth driver unit have the same circuit structure. The third driver unit and the (m?2)th driver unit have the same circuit structure. The fourth driver unit and the (m?3)th driver unit have the same circuit structure.Type: ApplicationFiled: April 23, 2014Publication date: February 12, 2015Applicant: HannStar Display CorporationInventors: Chun-Chin TSENG, Ya-Wen LEE, Wen-Zhe LIN, Kuo-Wen PAN
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Publication number: 20140232964Abstract: An integrated gate driver circuit includes a control circuit, a plurality of drive stages and a plurality of discharge transistors. The control circuit is configured to output a plurality of clock signals within a frame period and to output a discharge enabling signal within a blanking period of the frame period. Each of the drive stages receives the clock signals and includes an output terminal configured to output a gate driving signal. Each of the discharge transistors is coupled to the output terminal of one of the drive stages and discharges the output terminal according to the discharge enabling signal thereby eliminating the voltage fluctuation of the output terminal in the blanking period.Type: ApplicationFiled: February 27, 2014Publication date: August 21, 2014Applicant: HANNSTAR DISPLAY CORP.Inventors: Chun-Chin TSENG, Ya-Wen LEE, Kuo-Wen PAN, Chien-Ting CHAN
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Patent number: 8694772Abstract: A method and a system for managing network identity are provided. The method and the system realize a management mechanism of temporary identification (ID) and real ID, which simultaneously achieves functionalities such as anonymity, accounting, and authorization. A short-term certificate and a corresponding public/private key pair are used to protect a temporary ID usable for accounting. This protection prevents the temporary ID from theft. The user generates a digital signature in the reply to a charge schedule statement from the visited network. This procedure is incorporated into an existing authentication framework based on Transport Layer Security (TLS) in order to provide an undeniable payment mechanism. The payment mechanism is applicable in an environment of multiple network operators and reduces the difficulty of integrating network operators. The method and the system do not have to consult a certificate revocation list (CRL) for authentication and thus are able to shorten authentication time.Type: GrantFiled: October 20, 2008Date of Patent: April 8, 2014Assignee: Industrial Technology Research InstituteInventors: Min-Chih Kao, Ya-Wen Lee
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Publication number: 20140055333Abstract: A liquid crystal display (LCD) and a shift register device thereof are disclosed. The shift register device includes a plurality of serially connected shift registers for sequentially generating a plurality of scan signals. Each of the shift registers generates one of the scan signals according to a predetermined activating signal and a plurality of clock signals. The shift registers are categorized into a first group, a second group, and a third group. The first group of shift registers and the second group of shift registers have different circuit structures. The second group of shift registers and the third group of shift registers have different circuit structures. The first group of shift registers and the third group of shift registers have different circuit structures.Type: ApplicationFiled: April 1, 2013Publication date: February 27, 2014Inventors: Wen-Zhe Lin, Chun-Chin Tseng, Ya-Wen Lee, Chien-Chuan Ko, Hsin-Han Tsai
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Publication number: 20140043448Abstract: An auto-stereoscopic three-dimensional (3D) display including a display module and a driving module is provided. The display module includes a display panel and a barrier unit. The display panel has odd-column pixels and even-column pixels. The barrier unit coordinates with a left-eye image and a right-eye image displayed by the display panel to switch vertically and alternatively arranged slits and barriers, so as to produce a stereoscopic image in a viewer's eyes through parallax. The driving module provides left-eye image data and right-eye image data to drive the display module. The driving module drives the odd-column and even-column pixels respectively according to different driving timings, so as to respectively and sequentially enables the odd-column and even-column pixels during a plurality of corresponding frame periods to receive the left-eye image data and the right-eye image data and allow the display panel to display the left-eye and right-eye images.Type: ApplicationFiled: July 8, 2013Publication date: February 13, 2014Inventors: Chih-Hsuan Lee, Ya-Wen Lee, Chun-Chin Tseng
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Publication number: 20130335665Abstract: An integrated gate driver circuit includes a control circuit, a plurality of drive stages and a plurality of discharge transistors. The control circuit is configured to output a plurality of clock signals within a frame period and to output a discharge enabling signal within a blanking period of the frame period. Each of the drive stages receives the clock signals and includes an output terminal configured to output a gate driving signal. Each of the discharge transistors is coupled to the output terminal of one of the drive stages and discharges the output terminal according to the discharge enabling signal thereby eliminating the voltage fluctuation of the output terminal in the blanking period.Type: ApplicationFiled: February 20, 2013Publication date: December 19, 2013Applicant: HannStar Display Corp.Inventors: Chun-Chin TSENG, Ya-Wen Lee, Kuo-Wen Pan
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Patent number: 7849314Abstract: A method and a system for secure authentication in a wireless network are provided. The method comprises the following steps. First, a network device and a client device of a wireless network authenticate each other with EAP-TLS. Wherein, the network device mentioned above is a gateway or an access point. Then, the network device and the client device generate a TLS master secret jointly. In addition, the method uses a distributed mechanism to prevent the consequences of the failure of a single AAA server, and to alleviate the consequences resulting from a violated network device. Furthermore, the method includes a multiple time digital signature mechanism achieved by performing multiple times of one-way hash operation to enable verification and revocation of certificate.Type: GrantFiled: April 24, 2006Date of Patent: December 7, 2010Assignee: Industrial Technology Research InstituteInventors: Min-Chih Kao, Ya-Wen Lee, Yi-Shiung Yeh, Chen-Hwa Song
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Patent number: 7838386Abstract: Disclosed is a method and a system for forming alignment marks on a transparent substrate. A light reflective layer is deposited over an optically transparent substrate of a wafer. A region is defined around an alignment mark on the optically transparent substrate. The light reflective layer is removed from a substantial portion of the transparent substrate excluding the region. In addition, a micro electro-mechanical systems device is disclosed. The device comprises an optically transparent substrate, at least one optically partially transparent alignment mark on the optically transparent substrate, and a plurality of reflective elements or imaging pixels attached to the optically transparent substrate.Type: GrantFiled: September 23, 2008Date of Patent: November 23, 2010Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ruei-Hung Jang, Ya-Wen Lee, Tzu-Yang Wu, Sheng-Liang Pan, Chin-Hsiang Lin, Tsai-Sheng Gau
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Publication number: 20090098283Abstract: Disclosed is a method and a system for forming alignment marks on a transparent substrate. A light reflective layer is deposited over an optically transparent substrate of a wafer. A region is defined around an alignment mark on the optically transparent substrate. The light reflective layer is removed from a substantial portion of the transparent substrate excluding the region. In addition, a micro electro-mechanical systems device is disclosed. The device comprises an optically transparent substrate, at least one optically partially transparent alignment mark on the optically transparent substrate, and a plurality of reflective elements or imaging pixels attached to the optically transparent substrate.Type: ApplicationFiled: September 23, 2008Publication date: April 16, 2009Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Ruei-Hung JANG, Ya-Wen Lee, Tzu-Yang Wu, Sheng-Liang Pan, Chin-Hsiang Lin, Tsai-Sheng Gau
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Patent number: 7494830Abstract: A method for wafer backside alignment overlay accuracy includes forming a buried layer on a front-side of a wafer; forming a conductive layer on the buried layer and patterning a first test structure and a second test structure therein; forming an etch stop layer on the conductive layer; etching through the wafer from the backside to perform an alignment process with the first test structure; and determining an overlay accuracy of the alignment process with the second test structure. The first test structure includes an optical vernier and the second test structure includes an electrical testing structure.Type: GrantFiled: April 6, 2007Date of Patent: February 24, 2009Assignee: Taiwan Semiconductor Manufacturing CompanyInventors: Sheng-Chieh Liu, Tzu-Yang Wu, Ya-Wen Lee, Jeffery Chu, Hsueh-Liang Chou, Chia-Hung Kao
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Patent number: 7450296Abstract: Disclosed is a method and a system for forming alignment marks on a transparent substrate. A light reflective layer is deposited over an optically transparent substrate of a wafer. A region is defined around an alignment mark on the optically transparent substrate. The light reflective layer is removed from a substantial portion of the transparent substrate excluding the region. In addition, a micro electro-mechanical systems device is disclosed. The device comprises an optically transparent substrate, at least one optically partially transparent alignment mark on the optically transparent substrate, and a plurality of reflective elements or imaging pixels attached to the optically transparent substrate.Type: GrantFiled: April 10, 2006Date of Patent: November 11, 2008Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ruei-Hung Jang, Ya-Wen Lee, Tzu-Yang Wu, Sheng-Liang Pan, Chin-Hsiang Lin, Tsai-Sheng Gau
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Publication number: 20080248600Abstract: A method for wafer backside alignment overlay accuracy includes forming a buried layer on a front-side of a wafer; forming a conductive layer on the buried layer and patterning a first test structure and a second test structure therein; forming an etch stop layer on the conductive layer; etching through the wafer from the backside to perform an alignment process with the first test structure; and determining an overlay accuracy of the alignment process with the second test structure. The first test structure includes an optical vernier and the second test structure includes an electrical testing structure.Type: ApplicationFiled: April 6, 2007Publication date: October 9, 2008Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Sheng-Chieh Liu, Tzu-Yang Wu, Ya-Wen Lee, Jeffrey Chu, Hsueh-Liang Chou, Chia-Hung Kao
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Publication number: 20070177244Abstract: Disclosed is a method and a system for forming alignment marks on a transparent substrate. A light reflective layer is deposited over an optically transparent substrate of a wafer. A region is defined around an alignment mark on the optically transparent substrate. The light reflective layer is removed from a substantial portion of the transparent substrate excluding the region. In addition, a micro electro-mechanical systems device is disclosed. The device comprises an optically transparent substrate, at least one optically partially transparent alignment mark on the optically transparent substrate, and a plurality of reflective elements or imaging pixels attached to the optically transparent substrate.Type: ApplicationFiled: April 10, 2006Publication date: August 2, 2007Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Ruei-Hung Jang, Ya-Wen Lee, Tzu-Yang Wu, Sheng-Liang Pan, Chin-Hsiang Lin, Tsai-Sheng Gau
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Publication number: 20070162958Abstract: A method and a system for secure authentication in a wireless network are provided. The method comprises the following steps. First, a network device and a client device of a wireless network authenticate each other with EAP-TLS. Wherein, the network device mentioned above is a gateway or an access point. Then, the network device and the client device generate a TLS master secret jointly. In addition, the method uses a distributed mechanism to prevent the consequences of the failure of a single AAA server, and to alleviate the consequences resulting from a violated network device. Furthermore, the method includes a multiple time digital signature mechanism achieved by performing multiple times of one-way hash operation to enable verification and revocation of certificate.Type: ApplicationFiled: April 24, 2006Publication date: July 12, 2007Inventors: Min-Chih Kao, Ya-Wen Lee, Yi-Shiung Yeh, Chen-Hwa Song