Abstract: Methods and apparatus for boot time reduction in a processor and programmable logic device environment are disclosed. An example apparatus includes a multicore processor including a first core and a second core. A bootstrap processor is to initialize the first core into a standby mode and initialize the second core into a non-standby mode. A programmable logic device is to be programmed with instructions to be executed by the programmable logic device by the second core via a first connection initialized by the second core. The bootstrap processor is to, upon completion of the programming of the programmable logic device, initialize a data connection between the programmable logic device and the second core.

Abstract: Methods and apparatus for boot time reduction in a processor and programmable logic device environment are disclosed. An example apparatus includes a multicore processor including a first core and a second core. A bootstrap processor is to initialize the first core into a standby mode and initialize the second core into a non-standby mode. A programmable logic device is to be programmed with instructions to be executed by the programmable logic device by the second core via a first connection initialized by the second core. The bootstrap processor is to, upon completion of the programming of the programmable logic device, initialize a data connection between the programmable logic device and the second core.

Abstract: Methods and apparatus for boot time reduction in a processor and programmable logic device environment are disclosed. An example apparatus includes a multicore processor including a first core and a second core. A bootstrap processor is to initialize the first core into a standby mode and initialize the second core into a non-standby mode. A programmable logic device is to be programmed with instructions to be executed by the programmable logic device by the second core via a first connection initialized by the second core. The bootstrap processor is to, upon completion of the programming of the programmable logic device, initialize a data connection between the programmable logic device and the second core.

Abstract: Methods and apparatus for boot time reduction in a processor and programmable logic device environment are disclosed. An example apparatus includes a multicore processor including a first core and a second core. A bootstrap processor is to initialize the first core into a standby mode and initialize the second core into a non-standby mode. A programmable logic device is to be programmed with instructions to be executed by the programmable logic device by the second core via a first connection initialized by the second core. The bootstrap processor is to, upon completion of the programming of the programmable logic device, initialize a data connection between the programmable logic device and the second core.

Abstract: Various embodiments are generally directed to techniques for computing platform initialization, such as by utilizing a field programmable gate array (FPGA) to initialize one or more dependent bootable components (DPCs) of the computing platform, for instance. In one or more embodiments, the FPGA may be reconfigured to perform a runtime operation after initialization of the computing platform. In embodiments described herein, a DPC may include initialization of any hardware or software components of a computing platform, such as silicon components and platform components. In such embodiments, a boot sequence may include boot instructions to initialize a set of DPCs. In some such embodiments, the boot sequence may initialize the computing platform. In one or more embodiments, computing platform initialization may include preparing the computing platform to perform input/output (I/O) operations. In one or more such embodiments, the I/O operations may be performed via an operating system.

Abstract: Apparatus, systems, or methods for a programmable circuit to facilitate a processor to boot a computing device having the processor. A programmable circuit may include non-volatile storage and firmware stored in the non-volatile storage. The firmware may configure the programmable circuit as a memory controller of a memory device coupled to the programmable circuit, to facilitate the processor to boot the computing device having the processor, the programmable circuit, and the memory device, into operation. Other embodiments may also be described and claimed.

Abstract: Apparatus, systems, or methods for a programmable circuit to facilitate a processor to boot a computing device having the processor. A programmable circuit may include non-volatile storage and firmware stored in the non-volatile storage. The firmware may configure the programmable circuit as a memory controller of a memory device coupled to the programmable circuit, to facilitate the processor to boot the computing device having the processor, the programmable circuit, and the memory device, into operation. Other embodiments may also be described and claimed.

Abstract: A computer having an operating system is connected to a first memory. The computer operates to execute an on screen display (OSD) program in a first memory and a basic input output system (BIOS) application in a second memory. The BIOS application operates to display user information from user information data stored in the second memory on a display before the computer's operating system is loaded. The OSD program operates to display user information from the user information data stored in the second memory on the display after the computer's operating system is loaded. A process determines if a user input is selected, reads a memory for user information data if the user input is selected, and displays user information on a display before an operating system is loaded.

Abstract: A computer having an operating system is connected to a first memory. The computer operates to execute an on screen display (OSD) program in a first memory and a basic input output system (BIOS) application in a second memory. The BIOS application operates to display user information from user information data stored in the second memory on a display before the computer's operating system is loaded. The OSD program operates to display user information from the user information data stored in the second memory on the display after the computer's operating system is loaded. A process determines if a user input is selected, reads a memory for user information data if the user input is selected, and displays user information on a display before an operating system is loaded.