Abstract: A method for fabricating semiconductor devices includes forming channel regions over a substrate. The channel regions, in parallel with one another, extend along a first lateral direction. Each channel region includes at least a respective pair of epitaxial structures. The method includes forming a gate structure over the channel regions, wherein the gate structure extends along a second lateral direction. The method includes removing, through a first etching process, a portion of the gate structure that was disposed over a first one of the channel regions. The method includes removing, through a second etching process, a portion of the first channel region. The second etching process includes one silicon etching process and one silicon oxide deposition process. The method includes removing, through a third etching process controlled based on a pulse signal, a portion of the substrate that was disposed below the removed portion of the first channel region.

Abstract: A memory device includes a first memory array including: a plurality of memory strings spaced from each other along a first lateral direction and a second lateral direction, each of the plurality of memory strings including a plurality of memory cells arranged along a vertical direction; and a plurality of first conductive structures extending along the vertical direction; wherein each of the plurality of first conductive structures includes a first portion and a second portion; wherein the first portion extends across the plurality of memory cells of a corresponding pair of the plurality of memory strings along the vertical direction, and the second portion is disposed over the first portion along the vertical direction; and wherein the second portion extends farther than the first portion along at least one of the first or second lateral direction.

Abstract: In some aspects of the present disclosure, a memory device includes a first memory array including: a plurality of memory strings spaced from each other along a first lateral direction and a second lateral direction, each of the plurality of memory strings including a plurality of memory cells arranged along a vertical direction; and a plurality of first conductive structures extending along the vertical direction; wherein each of the plurality of first conductive structures includes a first portion and a second portion; wherein the first portion extends across the plurality of memory cells of a corresponding pair of the plurality of memory strings along the vertical direction, and the second portion is disposed over the first portion along the vertical direction; and wherein the second portion extends farther than the first portion along at least one of the first or second lateral direction.

Abstract: In some aspects of the present disclosure, a memory device includes a first memory array including: a plurality of memory strings spaced from each other along a first lateral direction and a second lateral direction, each of the plurality of memory strings including a plurality of memory cells arranged along a vertical direction; and a plurality of first conductive structures extending along the vertical direction; wherein each of the plurality of first conductive structures includes a first portion and a second portion; wherein the first portion extends across the plurality of memory cells of a corresponding pair of the plurality of memory strings along the vertical direction, and the second portion is disposed over the first portion along the vertical direction; and wherein the second portion extends farther than the first portion along at least one of the first or second lateral direction.

Abstract: The present invention provides a compound of Formula (I) and a salt thereof, wherein, m is an integer of 2 to 7, and R is independently at least one selected from the group consisting of hydrogen and C1-C20 alkyl. The compound promotes apoptosis in cancer cell and inhibits its growth. The present invention also provides a pharmaceutical composition which comprises the compound of Formula (I), a salt thereof and a pharmaceutically acceptable carrier. The present invention further provides a method for production of the pharmaceutical composition used for treating cancer.

Abstract: The present invention provides a compound of Formula (I) and a salt thereof, wherein, m is an integer of 2 to 7, and R is independently at least one selected from the group consisting of hydrogen and C1-C20 alkyl. The compound promotes apoptosis in cancer cell and inhibits its growth. The present invention also provides a pharmaceutical composition which comprises the compound of Formula (I), a salt thereof and a pharmaceutically acceptable carrier. The present invention further provides a method for production of the pharmaceutical composition used for treating cancer.

Abstract: The present invention is a printed circuit board having cooling means incorporated therein, which is coordinated with a fan. The fan comprises a frame, a stator, a rotator and a circuit board. The circuit board comprises at least one electronic component, a control IC and a heat discharge region. The heat discharge region comprises two heat dissipation areas with a plurality of holes; and the control IC is at a position corresponding to the heat discharge region. Accordingly, the circuit board can be ventilated and its heat-transfer structure can be destroyed to further obtain a better heat discharge so that the work efficiency of the control IC can be improved.

Abstract: The present invention is a printed circuit board having cooling means incorporated therein, which is coordinated with a fan. The fan comprises a frame, a stator, a rotator and a circuit board. The circuit board comprises at least one electronic component, a control IC and a heat discharge region. The heat discharge region comprises two heat dissipation areas with a plurality of holes; and the control IC is at a position corresponding to the heat discharge region. Accordingly, the circuit board can be ventilated and its heat-transfer structure can be destroyed to further obtain a better heat discharge so that the work efficiency of the control IC can be improved.