Abstract: The present disclosure provides a method for optimizing mask parameters, and the method includes: acquiring a test pattern, light source parameters, and initial mask parameters, the initial mask parameters including a mask thickness and an initial mask sidewall angle; generating multiple sets of candidate mask parameters according to the initial mask sidewall angle in the initial mask parameters; the multiple sets of candidate mask parameters including different mask sidewall angles and the same mask thickness; obtaining an imaging contrast of each set of candidate mask parameters based on the test pattern and the light source parameters; and selecting an optimal mask sidewall angle from the multiple sets of candidate mask parameters according to the imaging contrasts.

Abstract: A method for manufacturing a semiconductor device. A photolithographic coating, including a first film, a photolithographic film, and a second film, is formed on the to-be-connected structure. Refractive indexes of the first film and the second film are smaller than 1, so that the photolithographic coating forms an optical structure with a high reflection coefficient. The photolithographic coating is exposed to a light having a target wavelength through a mask. The to-be-connected structure is reflected in the photolithographic coating, and hence serves as another mask and is imaged to the photolithographic film. A pattern of the mask is simultaneously imaged to the photolithographic film. That is, both the to-be-connected structure and the pattern of the mask are imaged to a target region of the photolithographic film, and the target region corresponds to the to-be-connected structure.

Abstract: The present disclosure provides a method for optimizing mask parameters, and the method includes: acquiring a test pattern, light source parameters, and initial mask parameters, the initial mask parameters including a mask thickness and an initial mask sidewall angle; generating multiple sets of candidate mask parameters according to the initial mask sidewall angle in the initial mask parameters; the multiple sets of candidate mask parameters including different mask sidewall angles and the same mask thickness; obtaining an imaging contrast of each set of candidate mask parameters based on the test pattern and the light source parameters; and selecting an optimal mask sidewall angle from the multiple sets of candidate mask parameters according to the imaging contrasts.

Abstract: A method for manufacturing a semiconductor device. A photolithographic coating, including a first film, a photolithographic film, and a second film, is formed on the to-be-connected structure. Refractive indexes of the first film and the second film are smaller than 1, so that the photolithographic coating forms an optical structure with a high reflection coefficient. The photolithographic coating is exposed to a light having a target wavelength through a mask. The to-be-connected structure is reflected in the photolithographic coating, and hence serves as another mask and is imaged to the photolithographic film. A pattern of the mask is simultaneously imaged to the photolithographic film. That is, both the to-be-connected structure and the pattern of the mask are imaged to a target region of the photolithographic film, and the target region corresponds to the to-be-connected structure.

Abstract: A method and an arrangement for reducing a contact resistance of a two-dimensional crystal material are provided. An example method may include forming a contact material layer on a two-dimensional crystal material layer; performing ion implantation; and performing thermal annealing.

Abstract: A method for manufacturing a two-dimensional material structure and a resultant two-dimensional material device. The method comprises steps of: forming a sacrificial FIN structure on a substrate; covering the sacrificial FIN structure with a dielectric; releasing the sacrificial FIN structure; forming a carrier FIN structure at a position for releasing the sacrificial FIN; and self-restrictedly growing two-dimensional material structure by taking the carrier FIN structure as a substrate. Utilizing the sacrificial FIN structure to implement self-restrictedly growing of the nanometer structure of the two-dimensional material results in a high precision, lower edge roughness, high yields and low process deviation as well as compatibility with the processing of CMOS large scale integrated circuits, making the method suitable for a large scale production of the two-dimensional material and related devices.

Abstract: A method and an arrangement for reducing a contact resistance of a two-dimensional crystal material are provided. An example method may include forming a contact material layer on a two-dimensional crystal material layer; performing ion implantation; and performing thermal annealing.