Patents by Inventor Yaki Devila

Yaki Devila has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Addressable serial peripheral interface
    Patent number: 7761633
    Abstract: An addressable SPI bus and an associated communication protocol. The addressable SPI bus comprises a plurality of slaves each exhibiting a particular address and a shift register whose output is connected to a common MISO bus by a buffer exhibiting a three state output, also known as a tri-state output. The master asserts a single SS line, which is connected in parallel to each of the plurality of slaves, indicating the beginning of a frame, and transmits via the MOSI bus the address of a particular slave of the plurality of slaves, denoted interchangeably the target or destination slave. Responsive to the received address, the target slave enables the three state output associated therewith thus transmitting the output of the target slave shift register to the master via the MISO bus.
    Type: Grant
    Filed: January 24, 2008
    Date of Patent: July 20, 2010
    Assignee: Microsemi Corp. - Analog Mixed Signal Group Ltd.
    Inventors: Yaki Devila, Alon Ferentz, Roni Blaut, Amir Peleg
  • Addressable Serial Peripheral Interface
    Publication number: 20080183928
    Abstract: An addressable SPI bus and an associated communication protocol. The addressable SPI bus comprises a plurality of slaves each exhibiting a particular address and a shift register whose output is connected to a common MISO bus by a buffer exhibiting a three state output, also known as a tri-state output. The master asserts a single SS line, which is connected in parallel to each of the plurality of slaves, indicating the beginning of a frame, and transmits via the MOSI bus the address of a particular slave of the plurality of slaves, denoted interchangeably the target or destination slave. Responsive to the received address, the target slave enables the three state output associated therewith thus transmitting the output of the target slave shift register to the master via the MISO bus.
    Type: Application
    Filed: January 24, 2008
    Publication date: July 31, 2008
    Applicant: MICROSEMI CORP. - ANALOG MIXED SIGNAL GROUP LTD.
    Inventors: Yaki DEVILA, Alon FERENTZ, Roni BLAUT, Amir PELEG