Abstract: Described herein are systems and methods that provide for asymmetric image splitter image stream applications. In one embodiment, a system supporting image multi-streaming comprises an asymmetric image splitter engine that splits super-frame image streams into two or more image streams and a fractional clock divider circuit. The fractional clock divider may comprise a digital feedback control loop and a one-bit sigma delta modulator. The fractional clock divider circuit may provide compatible display clock frequencies for each of the two or more image streams. When a multi-image stream comprises the two image streams, the asymmetric image splitter engine adjusts a vertical asymmetry of a first image stream with a shortest height to same height as a second image stream by adding vertical padding to the first image stream. The super-frame image streams may comprise image streams from video, LIDAR, radar, or other sensors.

Abstract: Described herein are systems and methods that provide for asymmetric image splitter image stream applications. In one embodiment, a system supporting image multi-streaming comprises an asymmetric image splitter engine that splits super-frame image streams into two or more image streams and a fractional clock divider circuit. The fractional clock divider may comprise a digital feedback control loop and a one-bit sigma delta modulator. The fractional clock divider circuit may provide compatible display clock frequencies for each of the two or more image streams. When a multi-image stream comprises the two image streams, the asymmetric image splitter engine adjusts a vertical asymmetry of a first image stream with a shortest height to same height as a second image stream by adding vertical padding to the first image stream. The super-frame image streams may comprise image streams from video, LIDAR, radar, or other sensors.

Abstract: Described herein are systems and methods that provide for implement an asymmetric image splitter engine that may reduce the memory requirements. In one or more embodiments, a method may comprise receiving a multi-streaming video comprising super-frame video images, where each super-frame video images includes a first video image and a second video image, and where the height of the first video image is higher than the second video image. The vertical asymmetry of the second video image may be adjusted to same height as the first video image by adding padding to the second video image. An asymmetric image splitter engine may be utilized to split the super-frame video images into two separate video images. By marking each line of the second video image, it may be determined which lines are padded and discarded, and which lines are data to be displayed using a line mark memory.

Abstract: Described herein are systems and methods that provide for asymmetric image splitter image stream applications. In one embodiment, a system supporting image multi-streaming comprises an asymmetric image splitter engine that splits super-frame image streams into two or more image streams and a fractional clock divider circuit. The fractional clock divider may comprise a digital feedback control loop and a one-bit sigma delta modulator. The fractional clock divider circuit may provide compatible display clock frequencies for each of the two or more image streams. When a multi-image stream comprises the two image streams, the asymmetric image splitter engine adjusts a vertical asymmetry of a first image stream with a shortest height to same height as a second image stream by adding vertical padding to the first image stream. The super-frame image streams may comprise image streams from video, LIDAR, radar, or other sensors.

Abstract: Described herein are systems and methods that provide for implement an asymmetric image splitter engine that may reduce the memory requirements. In one or more embodiments, a method may comprise receiving a multi-streaming video comprising super-frame video images, where each super-frame video images includes a first video image and a second video image, and where the height of the first video image is higher than the second video image. The vertical asymmetry of the second video image may be adjusted to same height as the first video image by adding padding to the second video image. An asymmetric image splitter engine may be utilized to split the super-frame video images into two separate video images. By marking each line of the second video image, it may be determined which lines are padded and discarded, and which lines are data to be displayed using a line mark memory.