Patents by Inventor Yamahiro Iwasa

Yamahiro Iwasa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4970354
    Abstract: An electromagnetic wave shielding circuit and the production method thereof is described, wherein the circuit comprises a base board, an electric circuit formed on the base board, an electrically isolating coating coated over the electric circuit, a layer of coating having copper particles contained therein coated over the electrically isolating coating and hardened by heating, a copper plating layer attached to the surface of the copper particle containing coating for discharging out of the electric circuit an electromagnetic wave current which may be produced in the electric circuit, said copper particle containing coating having contained therein 100% by weight of copper particles and 12%-25% by weight of epoxy resin for a binder.
    Type: Grant
    Filed: February 21, 1989
    Date of Patent: November 13, 1990
    Assignee: Asahi Chemical Research Laboratory Co., Ltd.
    Inventors: Yamahiro Iwasa, Isao Morooka, Yoichi Oba
  • Patent number: 4837050
    Abstract: A method is described for producing electrically conductive circuits on a print base board having a copper lamination attached on one side face thereof, and more particularly relates to such method for producing the circuits of excellent electrical conductivity by effectively utilizing a newly developed electrically conductive copper paste which is specifically adapted to metal plating, wherein at least two-layer circuits are formed on one side of the base board, of which a first-layer circuit having a plurality of electrodes and a second-layer circuit having a plurality of ring-shaped electrodes formed in connection with the electrodes of the first-layer circuits, each electrode of the second-layer circuit being defined by outer and inner circumferences with a central opening defined by the inner circumference, such that the metal plating applied to the electrodes of the first- and second-layer circuits with a predetermined thickness of the metal plating layer may provide an electrically conductive path betw
    Type: Grant
    Filed: July 30, 1987
    Date of Patent: June 6, 1989
    Assignee: Asahi Chemical Research Laboratory Co., Ltd.
    Inventors: Yamahiro Iwasa, Yoichi Oba, Isao Morooka
  • Patent number: 4735676
    Abstract: A method for forming a plurality of electrically conductive circuits of at least four laminations on a single base board having copper laminations attached on both sides thereof, for example, wherein the base board is processed to provide a through-hole therein, subjected to a catalyst treatment, etched to provide a plurality of circuits of a first lamination, effectively processed with a plating-resistant resist and an electrically conductive copper paste to provide a circuit of a second lamination on the circuits of the first lamination by making a pre-plating treatment and a subsequent chemical treatment applied to the copper paste.
    Type: Grant
    Filed: December 29, 1986
    Date of Patent: April 5, 1988
    Assignee: Asahi Chemical Research Laboratory Co., Ltd.
    Inventor: Yamahiro Iwasa
  • Patent number: 4734156
    Abstract: A method for forming electrically conductive circuits on a base board is described, the method comprising the steps of: forming a first electrically conductive circuit layer on one side of a base board, the first circuit layer being receptive to a metal plating; coating a plating-resistant resist on the same side of the base board excluding certain portions of the first circuit layer which are required to be electrically connected to another circuit layer to be subsequently formed on the first circuit layer; coating an electrically conductive copper paste being receptive to a metal plating on the same side of the base board in a manner as to electrically connect said portions of the first circuit layer, with the exception of certain regions of said portions of the first circuit layer which are to be subsequently processed with a metal plating; heating the base board to harden the same; cleansing the base board; and immersing the base board in a metal plating solution to form a metal plating on the electricall
    Type: Grant
    Filed: August 12, 1986
    Date of Patent: March 29, 1988
    Assignee: Asahi Chemical Research Laboratory Co., Ltd.
    Inventor: Yamahiro Iwasa
  • Patent number: 4724040
    Abstract: A method is described for producing multilayer circuits including a resistor circuit on one side of a copper laminated base board, wherein the base board is etched to provide a plurality of circuits of a first layer, effectively processed with a plating-resistant resist and an electrically conductive copper paste to form a plurality of circuits of a second layer, immersed in a metal plating solution to provide a metal plating layer on the copper paste to thereby form the circuits of the second layer on the circuits of the first layer, coated with an electrically conductive paste to provide a pair of electric terminals between two of the circuits of the second layer, and coated with an electrically resistant resist of a predetermined electric resistance value on a part extended between the two electric terminals.
    Type: Grant
    Filed: December 11, 1986
    Date of Patent: February 9, 1988
    Assignee: Asahi Chemical Research Laboratory Co., Ltd.
    Inventor: Yamahiro Iwasa
  • Patent number: 4684054
    Abstract: An automatic soldering apparatus and method thereof is described, wherein a flux is heated up to a predetermined temperature, and is then contacted to a face of a printed base board to thereby coat the base board and to simultaneously heat the latter with the heated flux and then the heated base board is contacted to a melted solder, and wherein provided in combination are apparatus for transporting the base board, apparatus for coating the base board with the heated flux, the flux coating apparatus including a tank in which the flux is stored, heating elements for heating the flux up to a predetermined temperature such that the heated flux is coated on the face of the base board, the heated flux simultaneously heating the base board when the latter is transported to the flux storing tank, and apparatus for soldering the flux coated and heated base board, the soldering apparatus including a tank in which a melted solder is stored which is contacted to the base board when the latter is transported to the tank,
    Type: Grant
    Filed: March 12, 1986
    Date of Patent: August 4, 1987
    Assignee: Asahi Chemical Research Laboratory Co., Ltd.
    Inventors: Yamahiro Iwasa, Atsushi Kabe, Yoichi Oba
  • Patent number: 4683653
    Abstract: A method for producing a multilayer printed-circuit board is disclosed, the method substantially comprises the steps of: printing an electrically conductive paste on one or both sides of a predetermined number of electrically insulated prepreg base plates to form thereon electrically conductive circuits; drying the circuit processed base plates; laminating and pressing the circuit processed base plates into a single laminated board; making holes in the single laminated board, the holes being extended through in the direction of the thickness of the board; and applying an electrical conductor to the inner faces of the holes to make electrically conductive the laminated circuits to each other within the single laminated board.
    Type: Grant
    Filed: December 9, 1985
    Date of Patent: August 4, 1987
    Assignee: Asahi Chemical Research Laboratory Co., Ltd.
    Inventor: Yamahiro Iwasa
  • Patent number: 4353816
    Abstract: The power conductive coating is made of a combination in a liquid condition of 70-85 weight percent of copper powder, 15-30 weight percent of at least one selected from the group of phenol resin, epoxy resin, polyester resin and xylene resin, and a predetermined amount preferably 0.23-1.6 weight percent of at least one selected from the group of anthracene or the inducer thereof, anthranylic acid and anthrazine.
    Type: Grant
    Filed: January 19, 1981
    Date of Patent: October 12, 1982
    Assignee: Asahi Chemical Research Laboratory Co., Ltd.
    Inventor: Yamahiro Iwasa