Abstract: A voltage adjusting circuit is provided. The voltage adjusting circuit for adjusting the output voltages supplied by voltage sources includes a test control device, a multiplexer, a comparator, and a built in self test (BIST) device. The test control device selects one of the voltage sources as a testing voltage source, and outputs a selecting command for selecting the testing voltage source and a target voltage corresponding to the testing voltage source. The multiplexer is coupled to the voltage sources, receives an enablement signal, and outputs a voltage supplied by the testing voltage source as a testing voltage according to the enablement signal. The comparator compares the voltage levels of the testing voltage and the target voltage, and outputs a comparison result.

Abstract: An integrated circuit is provided. The integrated circuit includes a memory device and a discharge circuit. The discharge circuit discharges the well voltage line and the first voltage line of the memory device after the end of the erasing period and includes a first and second switch circuit and a first and second control voltage supplier. The first switch circuit is coupled between the well voltage line, the first voltage line and a second supplier. The second switch circuit is coupled between the first switch circuit and a reference voltage. The first control voltage supplier is coupled to the first switch circuit and supplies a first control voltage to turn on the first switch circuit during a first discharge period. The second control voltage supplier is coupled to the second switch circuit, and supplies a second control voltage to turn on the second switch circuit during a second discharge period.

Abstract: A flash memory and a regulated voltage generator thereof. The regulated voltage generator includes a charge pump having an output terminal outputting a first voltage, a control circuit coupled to the output terminal of the charge pump and having first and second output terminals outputting a second voltage and a charge pump control signal, respectively, and a Field Effect Transistor (FET) in diode mode. The FET is coupled between the output terminal of the charge pump and the first output terminal of the control circuit. The charge pump adjusts the first voltage according to the charge pump control signal.

Abstract: A voltage adjusting circuit is provided. The voltage adjusting circuit for adjusting the output voltages supplied by voltage sources includes a test control device, a multiplexer, a comparator, and a built in self test (BIST) device. The test control device selects one of the voltage sources as a testing voltage source, and outputs a selecting command for selecting the testing voltage source and a target voltage corresponding to the testing voltage source. The multiplexer is coupled to the voltage sources, receives an enablement signal, and outputs a voltage supplied by the testing voltage source as a testing voltage according to the enablement signal. The comparator compares the voltage levels of the testing voltage and the target voltage, and outputs a comparison result.

Abstract: An integrated circuit is provided. The integrated circuit includes a memory device and a discharge circuit. The discharge circuit discharges the well voltage line and the first voltage line of the memory device after the end of the erasing period and includes a first and second switch circuit and a first and second control voltage supplier. The first switch circuit is coupled between the well voltage line, the first voltage line and a second supplier. The second switch circuit is coupled between the first switch circuit and a reference voltage. The first control voltage supplier is coupled to the first switch circuit and supplies a first control voltage to turn on the first switch circuit during a first discharge period. The second control voltage supplier is coupled to the second switch circuit, and supplies a second control voltage to turn on the second switch circuit during a second discharge period.